| Part Number | A3S28D40JTP |
| Manufacturer | Zentel |
| Title | 128M Double Data Rate Synchronous DRAM |
| Description | A3S28D40JTP is a 4-bank x 2,097,152-word x 16bit double data rate synchronous DRAM , with SSTL_2 interface. All control and address signals are re... |
| Features |
- VDD=VDDQ=2.5V+0.2V (-50) - Double data rate architecture ; two data transfers per clock cycle. - Bidirectional , data strobe (DQS) is transmitted/received with data - Differential clock input (CLK and /CLK) - DLL aligns DQ and DQS transitions with ...
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| Datasheet |
 A3S28D40JTP Datasheet
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