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Aeroflex Circuit Technology
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UT54ACS191 Datasheet Preview

UT54ACS191 Datasheet

Synchronous 4-Bit Up-Down Binary Counters

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UT54ACS191 pdf
Standard Products
UT54ACS191/UT54ACTS191
Synchronous 4-Bit Up-Down Binary Counters
Datasheet
November 2010
www.aeroflex.com/logic
FEATURES
‰ Single down/up count control line
‰ Look-ahead circuitry enhances speed of cascaded counters
‰ Fully synchronous in count modes
‰ Asynchronously presettable with load control
‰ 1.2μ CMOS
- Latchup immune
‰ High speed
‰ Low power consumption
‰ Single 5 volt supply
‰ Available QML Q or V processes
‰ Flexible package
- 16-pin DIP
- 16-lead flatpack
‰ UT54ACS191 - SMD 5962-96564
‰ UT54ACTS191 - SMD 5962-96565
DESCRIPTION
The UT54ACS191 and the UT54ACTS191 are synchronous 4-
bit reversible up-down binary counters. Synchronous counting
operation is provided by having all flip-flops clocked simulta-
neously so that the outputs change coincident with each other
when so instructed. Synchronous operation eliminates the out-
put counting spikes associated with asynchronous counters.
The outputs of the four flip-flops are triggered on a low-to-high-
level transition of the clock input if the enable input (CTEN) is
low. A logic one applied to CTEN inhibits counting. The di-
rection of the count is determined by the level of the down/up
(D/U) input. When D/U is low, the counter counts up and when
D/U is high, it counts down.
The counters feature a fully independent clock circuit. Changes
at control inputs (CTEN and D/U) that will modify the operating
mode have no effect on the contents of the counter until clocking
occurs.
The counters are fully programmable. The outputs may be
preset to either logic level by placing a low on the load input
and entering the desired data at the data inputs. The output will
change to agree with the data inputs independently of the level
of the clock input. The asynchronous load allows counters to
be used as modulo-N dividers by simply modifying the count
length with the preset inputs.
Two outputs have been made available to perform the cascading
function: ripple clock and maximum/minimum (MAX/MIN)
count. The MAX/MIN output produces a high-level output
pulse with a duration approximately equal to one complete cycle
of the clock while the count is zero (all outputs low) counting
down or maximum (15) counting up.
PINOUTS
16-Pin DIP
Top View
B 1 16 VDD
QB 2 15 A
QA 3 14 CLK
CTEN 4 13 RCO
D/U 5 12 MAX/MIN
QC 6 11 LOAD
QD 7 10 C
VSS 8
9D
16-Lead Flatpack
Top View
B
QB
QA
CTEN
D/U
QC
QD
VSS
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
VDD
A
CLK
RCO
MAX/MIN
LOAD
C
D
The ripple clock output (RCO) produces a low-level output pulse
under those same conditions but only while the clock input is
low. The counters easily cascade by feeding the RCO to the
enable input of the succeeding counter if parallel clocking is
used, or to the clock input if parallel enabling is used. Use the
MAX/MIN count output to accomplish look-ahead for high-
speed operation.
The devices are characterized over full military temperature
range of -55°C to +125°C.
1



Aeroflex Circuit Technology
Aeroflex Circuit Technology

UT54ACS191 Datasheet Preview

UT54ACS191 Datasheet

Synchronous 4-Bit Up-Down Binary Counters

No Preview Available !

UT54ACS191 pdf
FUNCTION TABLE
FUNCTION
Count Up
Count Down
Asynchronous
Reset
No Change
LOAD
H
H
L
H
CTEN
L
L
X
H
D/U
L
H
X
X
CLK
X
X
LOGIC DIAGRAM
CLK (14)
D/U (5)
A (15)
CTEN (4)
B (1)
LOGIC SYMBOL
(4)
CTEN (5)
D/U
(14)
CLK
(11)
LOAD
CTRDIV 16
G1
M2 (DWN) 2(CT=0)Z6
M3 (UP) 3(CT=9)Z6
1,2 -/1,3+
G4
C5
6,1,4
(12)
MAX/MIN
(13)
RCO
(15)
A (1)
B (10)
C (9)
D
5D
(1) ±7
(2)
(4)
(8)
(3)
(2) QA
(6) QB
(7) QC
QD
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC
Publication 617-12.
(13) RCO
(12) MAX/MIN
1J S
Q
C1
Q
1K
R
(3)
QA
S
1J
Q
C1
Q
1K
R
(2)
QB
C (10)
D (9)
(11)
LOAD
S
1J
Q
C1
Q
1K
R
(6)
QC
S
1J
Q
C1
1K Q
R
(7) QD
2


Part Number UT54ACS191
Description Synchronous 4-Bit Up-Down Binary Counters
Maker Aeroflex Circuit Technology
Total Page 10 Pages
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