FCC approved method of EMI attenuation.
Generates a low EMI spread spectrum of the
input clock frequency.
Optimized for input frequency range between
35MHz – 55MHz.
Internal loop filter minimizes external
components and board space.
Frequency Deviation: ±1.65%.
Low inherent cycle-to-cycle jitter.
3.3 V or 5 V operating voltage.
CMOS/TTL compatible inputs and outputs.
Ultra low power CMOS design: 5.50 mA @3.3 V.
Supports notebook VGA and other LCD timing
Available in 8-pin SOIC and TSSOP.
The ASM3P2531A is a versatile spread spectrum
frequency modulator designed specifically for a wide
range of clock frequencies. It reduces electromagnetic
interference (EMI) at the clock source allowing system-
wide reduction of EMI of downstream clock and data
dependent signals. It allows significant system cost
savings by reducing the number of circuit board layers
and shielding traditionally required to pass EMI
The ASM3P2531A modulates the output of a single PLL
in order to spread the bandwidth of a synthesized clock,
thereby decreasing the peak amplitudes of its harmonics.
This results in significantly lower system EMI compared
to the typical narrow band signal produced by oscillators
and most clock generators. Lowering EMI by increasing
a signal’s bandwidth is called spread spectrum clock
The ASM3P2531A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all-digital method.
The ASM3P2531A is targeted toward the notebook VGA
chip and other displays using an LVDS interface, PC
peripheral devices, and embedded systems
Low Frequency EMI Reduction
Notice: The information in this document is subject to change without notice.
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