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Analog Devices Semiconductor Electronic Components Datasheet

ADP3162 Datasheet

5-Bit Programmable 2-Phase Synchronous Buck Controller

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ADP3162 pdf
a
FEATURES
ADOPT™ Optimal Positioning Technology for Superior
Load Transient Response and Fewest Output
Capacitors
Complies with VRM 8.5 with Lowest System Cost
Active Current Balancing Between Both Output Phases
5-Bit Digitally Programmable 1.05 V to 1.825 V Output
Dual Logic-Level PWM Outputs for Interface to
External High-Power Drivers
Total Output Accuracy ؎0.8% Over Temperature
Current-Mode Operation
Short Circuit Protection
Power Good Output
Overvoltage Protection Crowbar Protects
Microprocessors with No Additional
External Components
APPLICATIONS
Desktop PC Power Supplies for:
Intel Tualatin Processors
VRM Modules
5-Bit Programmable 2-Phase
Synchronous Buck Controller
ADP3162
FUNCTIONAL BLOCK DIAGRAM
VCC
REF
GND
CT
COMP
UVLO
& BIAS
3.0V
REFERENCE
SET
RESET
CROWBAR
2-PHASE
DRIVER
LOGIC
CMP3
DAC+24%
OSCILLATOR
ADP3162
CMP
CMP2
DAC–18%
CMP
CMP1
VID
DAC
gm
PWM1
PWM2
PWRGD
CS–
CS+
FB
GENERAL DESCRIPTION
The ADP3162 is a highly efficient dual output synchronous
buck switching regulator controller optimized for converting a
5 V or 12 V main supply into the core supply voltage required by
high-performance processors such as Tualatin. The ADP3162
uses an internal 5-bit DAC to read a voltage identification (VID)
code directly from the processor, which is used to set the output
voltage between 1.05 V and 1.825 V. The ADP3162 uses a
current mode PWM architecture to drive two logic-level outputs
at a programmable switching frequency that can be optimized
for VRM size and efficiency. The output signals are 180 degrees
out of phase, allowing for the construction of two complementary
buck switching stages. These two stages share the dc output
current to reduce overall output voltage ripple. An active cur-
rent balancing function ensures that both phases carry equal
portions of the total load current, even under large transient
loads, to minimize the size of the inductors.
VID3 VID2 VID1 VID0 VID25
The ADP3162 also uses a unique supplemental regulation tech-
nique called active voltage positioning to enhance load transient
performance. Active voltage positioning results in a dc/dc converter
that meets the stringent output voltage specifications for high
performance processors, with the minimum number of output
capacitors and smallest footprint. Unlike voltage-mode and
standard current-mode architectures, active voltage positioning
adjusts the output voltage as a function of the load current so
that it is always optimally positioned for a system transient. The
ADP3162 also provides accurate and reliable short circuit pro-
tection and adjustable current limiting.
The ADP3162 is specified over the commercial temperature
range of 0°C to 70°C and is available in a 16-lead narrow body
SOIC package.
ADOPT is a trademark of Analog Devices, Inc.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001


Analog Devices Semiconductor Electronic Components Datasheet

ADP3162 Datasheet

5-Bit Programmable 2-Phase Synchronous Buck Controller

No Preview Available !

ADP3162 pdf
ADP3162–SPECIFICATIONS1
(VCC = 12 V, IREF = 150 A, TA = 0؇C to 70؇C, unless otherwise noted.)
Parameter
Symbol
Conditions
Min Typ Max
FEEDBACK INPUT
Accuracy
1.05 V Output
1.5 V Output
1.825 V Output
Line Regulation
Input Bias Current
Crowbar Trip Threshold
Crowbar Reset Threshold
Crowbar Response Time
FB Low Foldback Threshold
REFERENCE
Output Voltage
Output Current
VID INPUTS
Input Low Voltage
Input High Voltage
Input Current
Pull-Up Resistance
Internal Pull-Up Voltage
VFB
VFB
IFB
VCROWBAR
tCROWBAR
VFB(LOW)
VREF
IREF
VIL(VID)
VIH(VID)
IVID
RVID
Figure 1
Figure 1
Figure 1
VCC = 10 V to 14 V
Percent of Nominal DAC Voltage
Percent of Nominal DAC Voltage
Overvoltage to PWM Going Low
1.042 1.050 1.058
1.488 1.500 1.512
1.811 1.825 1.839
0.05
5 50
114 124 134
50 60 70
300
425 500 575
0 IREF 300 µA
2.952 3.0 3.048
300
VID(x) = 0 V
0.6
2.2
280 400
12 17
2.7 3
3.3
OSCILLATOR
Maximum Frequency2
Frequency Accuracy
CT Charge Current
ERROR AMPLIFIER
Output Resistance
Transconductance
Output Current
Maximum Output Voltage
Output Disable Threshold
–3 dB Bandwidth
CURRENT SENSE
Threshold Voltage
VCOMP /VCS
Input Bias Current
Response Time
fCT(MAX)
fCT
ICT
RO(ERR)
gm(ERR)
IO(ERR)
VCOMP(MAX)
VCOMP(OFF)
BWERR
VCS(TH)
VCS(FOLD)
ni
ICS+, ICS–
tCS
TA = 25°C, CT = 91 pF
TA = 25°C, VFB in Regulation
TA = 25°C, VFB = 0 V
FB = 0 V
FB Forced to VOUT – 3%
COMP = Open
CS+ = VCC,
FB Forced to VOUT – 3%
0.8 V COMP 1 V
FB 375 mV
1 V VCOMP 3 V
CS+ = CS– = VCC
CS+ – (CS–) 89 mV
to PWM Going Low
2000
430 500
130 150
26 36
570
170
46
200
2.0 2.2
1
3.0
640 800
500
2.45
880
69 79 89
0 15
37 47 58
25
0.5 5
50
POWER GOOD COMPARATOR
Undervoltage Threshold
Overvoltage Threshold
Output Voltage Low
Response Time
VPWRGD(UV)
VPWRGD(OV)
VOL(PWRGD)
Percent of Nominal Output
Percent of Nominal Output
IPWRGD(SINK) = 100 µA
76 82
114 124
30
200
88
134
200
PWM OUTPUTS
Output Voltage Low
Output Voltage High
Output Current
Duty Cycle Limit2
VOL(PWM)
VOH(PWM)
IPWM
DC
IPWM(SINK) = 400 µA
IPWM(SOURCE) = 400 µA
Per Phase, Relative to fCT
100 500
4.5 5.0 5.5
0.4 1
50
Unit
V
V
V
%
nA
%
%
ns
mV
V
µA
V
V
µA
k
V
kHz
kHz
µA
µA
k
mmho
mA
V
mV
kHz
mV
mV
mV
V/V
µA
ns
%
%
mV
ns
mV
V
mA
%
–2– REV. A


Part Number ADP3162
Description 5-Bit Programmable 2-Phase Synchronous Buck Controller
Maker Analog Devices
Total Page 12 Pages
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