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ADP3191 Datasheet

Synchronous Buck Controller

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ADP3191 pdf
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6-Bit, Programmable 2-/3-/4-Phase,
Synchronous Buck Controller
FEATURES
Selectable 2-, 3-, or 4-phase operation at up to
1 MHz per phase
±14.5 mV worst-case differential sensing error
over temperature
Logic-level PWM outputs for interface to external
high power drivers
PWM Flex-ModeTM architecture for excellent load
transient performance
Active current balancing between all output phases
Built-in power good/crowbar blanking supports on-the-fly
VID code changes
6-bit digitally programmable 0.8375 V to 1.6 V output
Programmable short circuit protection with programmable
latch-off delay
APPLICATIONS
Desktop PC power supplies for
Next-generation Intel® processors
VRM modules
Games consoles
GENERAL DESCRIPTION
The ADP3191/ADP3191A1 are highly efficient, multiphase,
synchronous buck switching regulator controllers optimized for
converting a 5 V or 12 V main supply into the core supply voltage
required by high performance Intel processors. They use an
internal 6-bit DAC to read a voltage identification (VID) code
directly from the processor, which is used to set the output
voltage between 0.8375 V and 1.6 V. The devices use a multimode
PWM architecture to drive the logic-level outputs at a program-
mable switching frequency that can be optimized for VR size
and efficiency. The phase relationship of the output signals can
be programmed to provide 2-, 3-, or 4-phase operation, allowing
for the construction of up to four complementary buck
switching stages.
The ADP3191/ADP3191A also include programmable, no-load
offset and slope functions to adjust the output voltage as a function
of the load current, so it is always optimally positioned for a
system transient. The ADP3191/ADP3191A also provide
accurate and reliable short-circuit protection, adjustable current
limiting, and a delayed power good output that accommodates
on-the-fly output voltage changes requested by the CPU.
ADP3191
FUNCTIONAL BLOCK DIAGRAM
VCC
28
SHUNT
REGULATOR
(ADP3191 ONLY)
EN 11
GND 19
UVLO
SHUTDOWN
AND BIAS
DAC+150mV
CSREF
DAC–250mV
PWRGD 10
DELAY
RAMPADJ RT
14 13
OSCILLATOR
CMP
SET
RESET
EN
27 PWM1
CURRENT
BALANCING
CIRCUIT
CMP
CMP
RESET
2-/3-/4-PHASE
DRIVER LOGIC
RESET
26 PWM2
25 PWM3
CMP
RESET
24 PWM4
CROWBAR
CURRENT
LIMIT
ILIMIT 15
EN
DELAY 12
COMP 9
SOFT
START
CURRENT
LIMIT
CIRCUIT
23 SW1
22 SW2
21 SW3
20 SW4
17 CSSUM
16 CSREF
18 CSCOMP
8 FB
PRECISION
REFERENCE
VID
DAC
7
FBRTN
123456
VID4 VID3 VID2 VID1 VID0 VID5
Figure 1.
ADP3191/
ADP3191A
The ADP3191 is a replacement for the ADP3181. A built-in
shunt regulator allows the part to be connected to the 12 V
system supply through a series resistor.
The devices are specified over the commercial temperature
range of 0°C to 85°C and are available in a 28-lead TSSOP
and a 28-lead QSOP.
1 Protected by U. S. Patent Number 6,683,441; other patents pending.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.


Analog Devices Semiconductor Electronic Components Datasheet

ADP3191 Datasheet

Synchronous Buck Controller

No Preview Available !

ADP3191 pdf
ADP3191
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics and Test Circuits............... 7
Theory of Operation ........................................................................ 8
Startup Sequence .......................................................................... 8
Master Clock Frequency.............................................................. 8
Output Voltage Differential Sensing .......................................... 8
Output Current Sensing .............................................................. 8
Active Impedance Control Mode............................................... 9
Current-Control Mode and Thermal Balance.......................... 9
Voltage Control Mode.................................................................. 9
Soft Start ........................................................................................ 9
Current-Limit, Short-Circuit, and Latch-Off Protection...... 10
Dynamic VID.............................................................................. 10
Power Good Monitoring ........................................................... 12
Output Crowbar ......................................................................... 12
Output Enable and UVLO ........................................................ 12
Application Information................................................................ 14
Setting the Clock Frequency ..................................................... 14
REVISION HISTORY
3/06—Revision 0: Initial Version
Soft Start and Current-Limit Latch-Off Delay Times ........... 14
Inductor Selection ...................................................................... 14
Designing an Inductor............................................................... 15
Output Droop Resistance.......................................................... 15
Inductor DCR Temperature Correction ................................. 16
Output Offset .............................................................................. 16
COUT Selection ............................................................................. 17
Power MOSFETs......................................................................... 18
Ramp Resistor Selection............................................................ 19
COMP Pin Ramp ....................................................................... 19
Current-Limit Setpoint.............................................................. 19
Feedback Loop Compensation Design.................................... 19
CIN Selection and Input Current di/dt Reduction.................. 21
Tuning the ADP3191/ADP3191A............................................ 22
Replacing the ADP3181 with the ADP3191........................... 24
Choosing Between the ADP3191 and the ADP3191A ........ 24
RAMPADJ Filter......................................................................... 24
Shunt Resistor Design................................................................ 25
Layout and Component Placement.............................................. 26
General Recommendations....................................................... 26
Power Circuitry Recommendations ........................................ 26
Signal Circuitry Recommendations......................................... 26
Outline Dimensions ....................................................................... 27
Ordering Guide .......................................................................... 27
Rev. 0 | Page 2 of 28


Part Number ADP3191
Description Synchronous Buck Controller
Maker Analog Devices
Total Page 28 Pages
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