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Analog Devices Semiconductor Electronic Components Datasheet

ADP3405 Datasheet

GSM Power Management System

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ADP3405 pdf
a
GSM Power Management System
ADP3405
FEATURES
Handles all GSM Baseband Power Management
Functions
Four LDOs Optimized for Specific GSM Subsystems
Charges Li-Mn Coin Cell for Real-Time Clock
Charge Pump and Logic Level Translators for 3 V and 5 V
GSM SIM Modules
Narrow Body 4.4 mm 28-Lead TSSOP Package
APPLICATIONS
GSM/DCS/PCS Handsets
TeleMatic Systems
ICO/Iridium Terminals
GENERAL DESCRIPTION
The ADP3405 is a multifunction power management system IC
optimized for GSM cell phones. The wide input voltage range of
3.0 V to 7.0 V makes the ADP3405 ideal for both single cell Li-Ion
and three cell NiMH designs. The current consumption of the
ADP3405 has been optimized for maximum battery life, featuring
a ground current of only 150 µA when the phone is in standby
(digital LDO, and SIM card supply active). An undervoltage lock-
out (UVLO) prevents the startup when there is not enough energy
in the battery. All four integrated LDOs are optimized to power
one of the critical sub-blocks of the phone. Their novel anyCAP®
architecture requires only very small output capacitors for stability,
and the LDOs are insensitive to the capacitors’ equivalent series
resistance (ESR). This makes them stable with any capacitor,
including ceramic (MLCC) types for space-restricted applications.
A step-up converter is implemented to supply both the SIM
module and the level translation circuitry to adapt logic signals
for 3 V and 5 V SIM modules. Sophisticated controls are avail-
able for power-up during battery charging, keypad interface, and
charging of an auxiliary backup battery for the real-time clock.
These allow an easy interface between ADP3405, GSM proces-
sor, charger, and keypad. Furthermore, a reset circuit and a
thermal shutdown function have been implemented to support
reliable system design.
FUNCTIONAL BLOCK DIAGRAM
VBAT
ADP3405
DIGITAL
LDO
PWRONKEY
ROWX
PWRONIN
ANALOGON
RESCAP
CHRON
SIMBAT
CAP+
CAP؊
SIMPROG
SIMON
SIMGND
RESETIN
CLKIN
DATAIO
POWER-UP
SEQUENCING
AND
PROTECTION
LOGIC
RTC LDO
XTAL OSC
LDO
ANALOG
LDO
CHARGE
PUMP
LOGIC LEVEL
TRANSLATION
REF
+
BUFFER
I/O CLK RST
VCC
RESET
VRTC
VTCXO
VCCA
VSIM
REFOUT
DGND
AGND
anyCAP is a registered trademark of Analog Devices, Inc.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site:www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001


Analog Devices Semiconductor Electronic Components Datasheet

ADP3405 Datasheet

GSM Power Management System

No Preview Available !

ADP3405 pdf
ADP3405–SPECIFICATIONS (–20؇C TA +85؇C, VBAT = 3 V to 7 V, CVBAT = CSIMBAT = CVSIM = 10 F, CVCC = CVCCA = 2.2 F,
CVRTC = 0.1 F, CVTCXO = 0.22 F, CVCAP = 0.1 F, min. loads applied on all outputs, unless
otherwise noted.)
ELECTRICAL CHARACTERISTICS1
Parameter
SHUTDOWN SUPPLY CURRENT
VBAT = Low (UVLO Low)
VBAT = High (UVLO High)
OPERATING GROUND CURRENT
VCC and VRTC On
VCC, VRTC and VSIM On
All LDOs and VSIM On
All LDOs and VSIM On
UVLO CHARACTERISTICS
UVLO On Threshold
UVLO Hysteresis
INPUT CHARACTERISTICS
Input High Voltage
PWRONIN and ANALOGON
PWRONKEY
Input Low Voltage
PWRONIN and ANALOGON
PWRONKEY
PWRONKEY INPUT PULL-UP
RESISTANCE TO VBAT
CHRON CHARACTERISTICS
CHRON Threshold
CHRON Hysteresis Resistance
CHRON Input Bias Current
ROWX CHARACTERISTICS
ROWX Output Low Voltage
ROWX Output High Leakage
Current
SHUTDOWN
Thermal Shutdown Threshold2
Thermal Shutdown Hysteresis
DIGITAL LDO (VCC)
Output Voltage
Line Regulation
Load Regulation
Output Capacitor3
Dropout Voltage
ANALOG LDO (VCCA)
Output Voltage
Line Regulation
Load Regulation
Output Capacitor3
Dropout Voltage
Ripple Rejection
Output Noise Voltage
Symbol
IBAT
IGND
VBATUVLO
VIH
VIL
VT
RIN
IB
VOL
IIH
VCC
DVCC
DVCC
CO
VDO
VCCA
DVCCA
DVCCA
CO
VDO
DVBAT/
DVCCA
VNOISE
Conditions
VBAT = 2.7 V
VBAT = 3.6 V, VRTC On
Minimum Loads, VBAT = 3.6 V
Minimum Loads, VBAT = 3.6 V
Minimum Loads, VBAT = 3.6 V
Maximum Loads, VBAT = 3.6 V
2.38 < CHRON < VT
CHRON > VT
PWRONKEY = Low
IOL = 200 µA
PWRONKEY = High
V(ROWX) = 5 V
Junction Temperature
Junction Temperature
Line, Load, Temp
3 V < VBAT < 7 V, Min Load
50 µA < ILOAD < 100 mA,
VBAT = 3.6 V
VO = VINITIAL – 100 mV
ILOAD = 100 mA
Line, Load, Temp
3 V < VBAT < 7 V, Min Load
200 µA < ILOAD < 130 mA,
VBAT = 3.6 V
VO = VINITIAL – 100 mV
ILOAD = 130 mA
f = 217 Hz (t = 4.6 ms)
VBAT = 3.6 V
f = 10 Hz to 100 kHz
ILOAD = 130 mA, VBAT = 3.6 V
Min Typ Max
3 20
12 30
100 140
150 240
260 400
15
3.2 3.3
200
Unit
µA
µA
µA
µA
µA
mA
V
mV
2
0.7 ϫ VBAT
V
V
0.4 V
0.3 ϫ VBAT V
15 20 25
k
2.38 2.48 2.58
108 125 138
0.5
V
k
µA
0.4 V
1 µA
160
35
2.710 2.765 2.820
2
15
2.2
215
ºC
ºC
V
mV
mV
µF
mV
2.710
2.765 2.820
2
15
2.2
215
65 70
75
V
mV
mV
µF
mV
dB
µV rms
–2– REV. 0


Part Number ADP3405
Description GSM Power Management System
Maker Analog Devices
Total Page 12 Pages
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