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Cypress Semiconductor Electronic Components Datasheet

CY8C20X66 Datasheet

(CY8C20X46 / CY8C20X66) Applications

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CY8C20X66 pdf
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CY8C20x46, CY8C20x66
CapSense™ Applications
Features
Low Power CapSenseTM Block
Configurable Capacitive Sensing Elements
Supports Combination of CapSense Buttons, Sliders,
Touchpads, TouchScreens, and Proximity Sensors
Powerful Harvard Architecture Processor
M8C Processor Speeds Running to 24 MHz
Low Power at High Speed
Interrupt Controller
1.71V to 5.5V Operating Voltage
Temperature Range: – 40°C to +85°C
Flexible On-Chip Memory
Two Program Storage Size Options
• CY8C20x46: 16K Flash
• CY8C20x66: 32K Flash
50,000 Erase/Write Cycles
2048 Bytes SRAM Data Storage
Partial Flash Updates
Flexible Protection Modes
In-System Serial Programming (ISSP)
Full-Speed USB (12 Maps)
Eight Uni-Directional Endpoints
One Bi-Directional Control Endpoint
USB 2.0 Compliant
Dedicated 512 Byte Buffer
Internal 3.3V Output Regulator
Available on 48-Pin QFN and 48-Pin SSOP packages only
Operating voltage with USB enabled:
• 3.15 to 3.45V when supply voltage is around 3.3V
• 4.35 to 5.25V when supply voltage is around 5.0V
Complete Development Tools
Free Development Tool (PSoC Designer™)
Full-Featured, In-Circuit Emulator and Programmer
Full Speed Emulation
Complex Breakpoint Structure
128K Trace Memory
Precision, Programmable Clocking
Internal ± 5.0% 6/12/24 MHz Main Oscillator
Internal Low Speed Oscillator at 32 kHz for Watchdog and
Sleep
Optional External 32 kHz Crystal
0.25% Accuracy for USB with No External Components
Programmable Pin Configurations
25 mA Sink Current on All GPIO
Pull Up, High Z, Open Drain Drive Modes on All GPIO
CMOS Drive Mode on Ports 0 and 1
Up to 36 Analog Inputs on GPIO
Configurable Inputs on All GPIO
Selectable, Regulated Digital IO on Port 1
Configurable Input Threshold for Port 1
3.0V, 20 mA Total Port 1 Source Current
5 mA Source Current Mode on Ports 0 and 1
Hot-Swap Capability on all Port1 GPIO
Versatile Analog Mux
Common Internal Analog Bus
Simultaneous Connection of IO Combinations
High PSRR Comparator
Low Dropout Voltage Regulator for the Analog Array
Additional System Resources
I2C™ Slave
• Selectable to 50 kHz, 100 kHz, or 400 kHz
• Implementation Requires No Clock Stretching
• Implementation During Sleep Modes with
Less Than 100 µA
• Hardware Address Detection
SPI™ Master and SPI Slave
• Configurable Between 46.9 kHz – 12 MHz
Three 16-Bit Timers
Watchdog and Sleep Timers
Internal Voltage Reference
Integrated Supervisory Circuit
Package Options
16-Pin 3x3 x 0.6 mm QFN
24-Pin 4x4 x 0.6 mm QFN
32-Pin 5x5 x 0.6 mm QFN
48-Pin 7x7 x 1.0 mm QFN (CY8C20x66 only)
48-Pin SSOP
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-12696 Rev. *C
• San Jose, CA 95134-1709 • 408-943-2600
Revised October 13, 2008
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Cypress Semiconductor Electronic Components Datasheet

CY8C20X66 Datasheet

(CY8C20X46 / CY8C20X66) Applications

No Preview Available !

CY8C20X66 pdf
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Block Diagram
CY8C20x46, CY8C20x66
PSoC CORE
Port 4 Port 3
Port 2
Port 1
Port 0
1.8/2.5/3V PWRSYS
LDO
(Regulator)
SYSTEM BUS
Global Analog Interconnect
2K SRAM
Interrupt
Controller
Supervisory ROM (SROM)
16K/32K Flash
Nonvolatile Memory
CPU Core (M8C)
Sleep and
Watchdog
6/12/24 MHz Internal Main Oscillator
(IMO)
Internal Low Speed Oscillator (ILO)
Multiple Clock Sources
CAPSENSE
SYSTEM
Two
Comparators
SYSTEM BUS
CapSense
Module
Analog
Reference
Analog
Mux
USB
I2C
Slave
Internal
Voltage
References
System
Resets
POR
and
LVD
SPI
Master/
Slave
SYSTEM RESOURCES
Three 16-Bit
Programmable
Timers
Digital
Clocks
Document Number: 001-12696 Rev. *C
Page 2 of 34
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Part Number CY8C20X66
Description (CY8C20X46 / CY8C20X66) Applications
Maker Cypress Semiconductor
Total Page 30 Pages
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