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Integrated Circuit Systems
Integrated Circuit Systems

V104 Datasheet Preview

V104 Datasheet

10 BIT LVDS RECEIVER

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V104 pdf
V104
10 BIT LVDS RECEIVER FOR VIDEO
PRELIMINARY
General Description
The V104 10 Bit LVDS Receiver for Video is designed
to support video data transmission between display
engines and video processing engines for television
and projector applications. The V104 supports up to
WXGA resolutions for Plasma, Rear Projection, Front
Projection, CRT and LCD applications.
The V104 converts the 6 LVDS (Low Voltage
Differential Signaling) video data stream pairs to 35
www.DataSheeCt4UM.cOoSm/TTL data bits with a rising or falling edge clock.
The clock edge selection is performed using a
dedicated pin.
In conjunction with the V103 transmitter, the V104 can
transmit 10 bits per color (R, G, B) along with 5 bits of
control and timing data (HSYNC, VSYNC, DE, CNTL1,
CNTL2) over a low EMI, low bus width connection
including connectors and standard LVDS cabling.
Features
Pin & function compatible with the THC63LVD104A
Wide pixel clock range: 8 - 90 MHz
Supports resolutions from 480p to WXGA
Internal PLL does not require external loop filter
Clock edge selection for TTL alignment selectable
Power down mode
Single 3.3V supply
Low power consumption CMOS design
64-pin TQFP lead free package
Block Diagram
LVDS Input
RA+/-
RB+/-
RC+/-
RD+/-
RE+/-
RCLK+/-
(8 to 90 MHz)
CMOS/TTL Input
TEST
PD
OE
R/F
Serial to
Parallel
PLL
CMOS/TTL Output
7 RA6-RA0
7 RB6-RB0
7 RC6-RC0
7 RD6-RD0
7 RE6-RE0
CLKOUT
V104 Datasheet
1
1/12/05
Revision 1.6
Integrated Circuit Systems • 525 Race Street, San Jose, CA 95126 • tel (408) 297-1201 • www.icst.com



Integrated Circuit Systems
Integrated Circuit Systems

V104 Datasheet Preview

V104 Datasheet

10 BIT LVDS RECEIVER

No Preview Available !

V104 pdf
V104
10 BIT LVDS RECEIVER FOR VIDEO
Pin Assignment
PRELIMINARY
www.DataSheet4U.com
GND
TEST
PD
OE
R/F
RE6
RE5
RE4
VCC
RE3
RE2
RE1
RE0
RD6
RD5
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
64-pin TQFP
48 VCC
47 RA0
46 RA1
45 RA2
44 GND
43 RA3
42 RA4
41 RA5
40 RA6
39 RB0
38 RB1
37 VCC
36 RB2
35 RB3
34 RB4
33 RB5
Pin Descriptions
Pin
Number
50, 49
52, 51
55, 54
60, 59
62, 61
57, 56
40, 41, 42, 43,
45, 46, 47
32, 33, 34, 35,
36, 38, 39
22, 24, 25, 26,
27, 28, 29
14, 15, 17, 18,
19, 20, 21
Pin
Name
RA+, RA-
RB+, RB-
RC+, RC-
RD+, RD-
RE+, RE-
RCLK+, RCLK-
RA6 ~ RA0
RB6 ~ RB0
RC6 ~ RC0
RD6 ~ RD0
Pin Type
LVDS IN
LVDS IN
LVDS IN
LVDS IN
LVDS IN
LVDS IN
OUT
OUT
OUT
OUT
Pin Description
LVDS Data In
LVDS Data In
LVDS Data In
LVDS Data In
LVDS Data In
LVDS Clock In
CMOS/TTL Data Outputs
CMOS/TTL Data Outputs
CMOS/TTL Data Outputs
CMOS/TTL Data Outputs
V104 Datasheet
2
1/12/05
Revision 1.6
Integrated Circuit Systems • 525 Race Street, San Jose, CA 95126 • tel (408) 297-1201 • www.icst.com


Part Number V104
Description 10 BIT LVDS RECEIVER
Maker Integrated Circuit Systems
Total Page 11 Pages
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