80Msps Low Power Dual ADCs
n 2-Channel Simultaneous Sampling ADC
n 70.6dB SNR
n 88dB SFDR
n Low Power: 292mW/238mW/200mW Total,
146mW/119mW/100mW per Channel
n Single 1.8V Supply
n Serial LVDS Outputs: 1 or 2 Bits per Channel
n Selectable Input Ranges: 1VP-P to 2VP-P
n 800MHz Full Power Bandwidth S/H
n Shutdown and Nap Modes
n Serial SPI Port for Conﬁguration
n Pin Compatible 14-Bit and 12-Bit Versions
n 40-Pin (6mm × 6mm) QFN Package
n Cellular Base Stations
n Software Deﬁned Radios
n Portable Medical Imaging
n Multichannel Data Acquisition
n Nondestructive Testing
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
The LTC®2268-12/LTC2267-12/LTC2266-12 are 2-channel,
simultaneous sampling 12-bit A/D converters designed
for digitizing high frequency, wide dynamic range signals.
They are perfect for demanding communications applica-
tions with AC performance that includes 70.6dB SNR and
88dB spurious free dynamic range (SFDR). Ultralow jitter
of 0.15psRMS allows undersampling of IF frequencies with
excellent noise performance.
DC specs include ±0.3LSB INL (typ), ±0.1LSB DNL (typ)
and no missing codes over temperature. The transition
noise is a low 0.3LSBRMS.
The digital outputs are serial LVDS to minimize the num-
ber of data lines. Each channel outputs two bits at a time
(2-lane mode). At lower sampling rates there is a one bit
per channel option (1-lane mode). The LVDS drivers have
optional internal termination and adjustable output levels
to ensure clean signal integrity.
The ENC+ and ENC– inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL, or
CMOS inputs. An internal clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
2-Tone FFT, fIN = 70MHz and 75MHz
0 10 20 30 40 50 60