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Maxim Integrated Semiconductor Electronic Components Datasheet

MAX5823 Datasheet

(MAX5823 - MAX5825) 8-/10-/12-Bit Buffered Output DACs

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MAX5823 pdf
EVALUATION KIT AVAILABLE
MAX5823/MAX5824/MAX5825
Ultra-Small, Octal Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and I2C Interface
General Description
The MAX5823/MAX5824/MAX5825 8-channel, low-power,
8-/10-/12-bit, voltage-output digital-to-analog converters
(DACs) include output buffers and an internal 3ppm/°C
reference that is selectable to be 2.048V, 2.500V, or
4.096V. The MAX5823/MAX5824/MAX5825 accept a
wide supply voltage range of 2.7V to 5.5V with extremely
low power (6mW) consumption to accommodate most
low-voltage applications. A precision external reference
input allows rail-to-rail operation and presents a 100kI
(typ) load to an external reference.
The MAX5823/MAX5824/MAX5825 have an I2C-compatible,
2-wire interface that operates at clock rates up to
400kHz. The DAC output is buffered and has a low sup-
ply current of less than 250FA per channel and a low
offset error of Q0.5mV (typ). On power-up, the MAX5823/
MAX5824/MAX5825 reset the DAC outputs to zero or mid-
scale based on the status of M/Z logic input, providing
flexibility for a variety of control applications. The internal
reference is initially powered down to allow use of an
external reference. The MAX5823/MAX5824/MAX5825
allow simultaneous output updates using software LOAD
commands or the hardware load DAC logic input (LDAC).
The MAX5823/MAX5824/MAX5825 feature a watchdog
function which can be enabled to monitor the I/O inter-
face for activity and integrity.
A clear logic input (CLR) allows the contents of the CODE
and the DAC registers to be cleared asynchronously and
simultaneously sets the DAC outputs to the program-
mable default value. The MAX5823/MAX5824/MAX5825
are available in a 20-pin TSSOP and an ultra-small,
20-bump WLP package and are specified over the -40NC
to +125NC temperature range.
Applications
Programmable Voltage and Current Sources
Gain and Offset Adjustment
Automatic Tuning and Optical Control
Power Amplifier Control and Biasing
Process Control and Servo Loops
Portable Instrumentation
Benefits and Features
S Eight High-Accuracy DAC Channels
12-Bit Accuracy Without Adjustment
±1 LSB INL Buffered Voltage Output
Guaranteed Monotonic Over All Operating
Conditions
Independent Mode Settings for Each DAC
S Three Precision Selectable Internal References
2.048V, 2.500V, or 4.096V
S Internal Output Buffer
Rail-to-Rail Operation with External Reference
4.5µs Settling Time
Outputs Directly Drive 2kI Loads
S Small 6.5mm x 4.4mm 20-Pin TSSOP or Ultra-
Small 2.5mm x 2.3mm 20-Bump WLP Package
S Wide 2.7V to 5.5V Supply Range
S Separate 1.8V to 5.5V VDDIO Power-Supply Input
S Fast 400kHz I2C-Compatible, 2-Wire Serial
Interface
S Pin-Selectable Power-On-Reset to Zero-Scale or
Midscale DAC Output
S LDAC and CLR For Asynchronous DAC Control
S Three Software-Selectable Power-Down Output
Impedances
1kI, 100kI, or High Impedance
Functional Diagram
VDDIO
VDD REF
SCL
SDA
ADDR0
ADDR1
CLR
LDAC
IRQ
M/Z
I2C SERIAL
INTERFACE
WATCHDOG
TIMER
POR
INTERNAL REFERENCE/
EXTERNAL BUFFER
CODE
REGISTER
DAC
LATCH
8 -/10-/12-BIT
DAC
CODE
CLEAR /
RESET
LOAD
(GATE/
CLEAR /
RESET)
DAC CONTROL LOGIC
POWER-DOWN
GND
MAX5823
MAX5824
MAX5825
1 OF 8 DAC CHANNELS
BUFFER
100kI 1kI
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
For related parts and recommended products to use with this part,
refer to: www.maximintegrated.com/MAX5823.related
Ordering Information appears at end of data sheet.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-6185; Rev 2; 2/13
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Maxim Integrated Semiconductor Electronic Components Datasheet

MAX5823 Datasheet

(MAX5823 - MAX5825) 8-/10-/12-Bit Buffered Output DACs

No Preview Available !

MAX5823 pdf
MAX5823/MAX5824/MAX5825
Ultra-Small, Octal Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and I2C Interface
Absolute Maximum Ratings
VDD, VDDIO to GND.................................................-0.3V to +6V
OUT_, REF to GND....0.3V to the lower of (VDD + 0.3V) and +6V
SCL, SDA, IRQ, M/Z, LDAC, CLR to GND..............-0.3V to +6V
ADDR_ to GND.............................................-0.3V to the lower of
(VDDIO + 0.3V) and +6V
Continuous Power Dissipation (TA = +70NC)
TSSOP (derate at 13.6mW/NC above 70NC)...............1084mW
WLP (derate at 21.3mW/NC above 70NC)...................1700mW
Maximum Continuous Current into Any Pin..................... Q50mA
Operating Temperature..................................... -40NC to +125NC
Storage Temperature........................................ -65NC to +150NC
Lead Temperature (TSSOP only)(soldering, 10s)............+300NC
Soldering Temperature (reflow)..................................... +260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Package Thermal Characteristics (Note 1)
TSSOP
Junction-to-Ambient Thermal Resistance (θJA) .......73.8NC/W
Junction-to-Case Thermal Resistance (θJC) ...............20NC/W
WLP
Junction-to-Ambient Thermal Resistance (θJA)
(Note 2)....................................................................47NC/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Note 2: Visit www.maximintegrated.com/app-notes/index.mvp/id/1891 for information about the thermal performance of WLP pack-
aging.
Electrical Characteristics
(VDD = 2.7V to 5.5V, VDDIO = 1.8V to 5.5V, VGND = 0V, CL = 200pF, RL = 2kI, TA = -40NC to +125NC, unless otherwise noted.)
(Note 3)
PARAMETER
DC PERFORMANCE (Note 4)
Resolution and Monotonicity
Integral Nonlinearity (Note 5)
Differential Nonlinearity (Note 5)
Offset Error (Note 6)
Offset Error Drift
Gain Error (Note 6)
Gain Temperature Coefficient
Zero-Scale Error
Full-Scale Error
SYMBOL
N
INL
DNL
OE
MAX5823
MAX5824
MAX5825
MAX5823
MAX5824
MAX5825
MAX5823
MAX5824
MAX5825
CONDITIONS
GE
With respect to VREF
With respect to VREF
MIN TYP MAX UNITS
8
10
12
-0.25
-0.5
-1
-0.25
-0.5
-1
-5
-1.0
0
-0.5
Bits
Q0.05
Q0.2
Q0.5
Q0.05
Q0.1
Q0.2
Q0.5
Q10
Q0.1
+0.25
+0.5
+1
+0.25
+0.5
+1
+5
+1.0
Q3.0
+10
+0.5
LSB
LSB
mV
FV/NC
%FS
ppm of
FS/NC
mV
%FS
Maxim Integrated
  2
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Part Number MAX5823
Description (MAX5823 - MAX5825) 8-/10-/12-Bit Buffered Output DACs
Maker Maxim Integrated
Total Page 30 Pages
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