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Maxim Integrated Semiconductor Electronic Components Datasheet

MAX3634 Datasheet

622Mbps/1244Mbps Burst-Mode Clock Phase Aligner

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MAX3634 pdf
19-3818; Rev 0; 9/05
622Mbps/1244Mbps Burst-Mode Clock Phase
Aligner for GPON OLT Applications
www.datasheet4u.com
General Description
The MAX3634 burst-mode clock phase aligner (CPA) is
designed specifically for 622Mbps or 1244Mbps GPON
(ITU G.984) optical line terminal (OLT) receiver applica-
tions. The MAX3634 provides clock and clock-aligned
resynchronized upstream data through differential
LVPECL outputs. Using the OLT system clock as a ref-
erence, the MAX3634 aligns to the input data and
acquires within the first 13 bits of the burst. The CPA
operates with received data that is frequency locked to
the OLT reference. The acquisition time, bit-error ratio,
and jitter tolerance all support GPON PMD specifica-
tions. LVPECL high-speed clock and data outputs pro-
vide compatibility with FPGAs at 622Mbps and with the
MAX3885 deserializer at 1244Mbps.
The MAX3634 is available in a low-profile, 7mm x 7mm,
48-lead TQFN package. The MAX3634 operates from a
single +3.3V supply, over the -40°C to +85°C tempera-
ture range.
Applications
622Mbps GPON OLT Receivers
1244Mbps GPON OLT Receivers
Features
DC-Coupled Clock Phase Aligner for Burst-Mode
GPON Applications
13-Bit Burst Acquisition Time
0.85UI High-Frequency Jitter Tolerance
Continuous Clock Output
Byte Rate (1/8th Data Rate) Reference Clock Input
Lock Detect Output
LVPECL Serial Data Input and Output
LVPECL Reset Input
Ordering Information
PART
MAX3634ETM
TEMP RANGE
-40°C to +85°C
PIN-
PACKAGE
48 TQFN
(7mm x 7mm)
PKG
CODE
T4877-6
Pin Configuration appears at end of data sheet.
Typical Application Circuit
BURST RESET
DATA
CLOCK
MAX3634
BURST-MODE
CLOCK PHASE
ALIGNER
BURST-MODE
TIA/LA
UPSTREAM
1244Mbps
DIVIDE BY 8 RATESEL
OLT CLOCK
DATA
MAX3738
CONTINUOUS
LASER DRIVER
GPON OPTICAL LINE TERMINATION
DOWNSTREAM
2488Mbps
BURST ENABLE
MAX3656
BURST-MODE
LASER DRIVER
MAX3892
DATA
SERIALIZER
4 DATA
CLOCK
DIVIDE BY 16
MAX3864
MAX3748A
TIA/LA
MAX3872
SONET
CDR
CLOCK
DATA
GPON OPTICAL NETWORK TERMINATION
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.


Maxim Integrated Semiconductor Electronic Components Datasheet

MAX3634 Datasheet

622Mbps/1244Mbps Burst-Mode Clock Phase Aligner

No Preview Available !

MAX3634 pdf
622Mbps/1244Mbps Burst-Mode Clock Phase
Aligner for GPON OLT Applications
www.daAtasBheSeOt4uL.cUomTE MAXIMUM RATINGS
VCC, VCCI, VCCO, VCCV ........................................-0.5V to +4.0V
SDI±, RST±, REFCLK±,
RATESEL, FILT, TEST.............................-0.5V to (VCC + 0.5V)
LVPECL Output Current (SDO±, SCLK±, LOCK±).............50mA
Continuous Power Dissipation (TA = +85°C)
48-Lead TQFN package
(derate 27.8mW/°C above +85°C) .............................1800mW
Storage Temperature Range .............................-55°C to +150°C
Operating Ambient Temperature Range .............-40°C to +85°C
Lead Temperature (soldering, 10s) .................................+400°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, TA = -40°C to +85°C. Typical values are at VCC = +3.3V, TA = +25°C, unless otherwise noted.)
PARAMETER
Supply Current
Data Rate
Reference Clock Input Frequency
SDI, RST, REFCLK Differential
Input
SDI±, RST±, REFCLK± Input
Current
RST Input Rise/Fall Times
SDI±, RST±, REFCLK± Common-
Mode Input
SYMBOL
ICC
CONDITIONS
Not including LVPECL output current
RATESEL = low
RATESEL = high
RATESEL = low
RATESEL = high
VIN
Rate = 1244Mbps
tr, tf
Rate = 622Mbps
SDO±, SCLK±, LOCK± Output
Voltage Low
TA = 0°C to +85°C (Note 1)
VOL
TA = -40°C to 0°C (Note 1)
SDO±, SCLK±, LOCK± Output
Voltage High
Jitter Tolerance
Acquisition Time
Bit-Error Ratio
SDO±, LOCK± Transition Time
SCLK± Transition Time
TA = 0°C to +85°C (Note 1)
VOH
TA = -40°C to 0°C (Note 1)
622Mbps (Notes 2, 5, 6)
1244Mbps (Notes 2, 5, 6)
(Notes 2, 3)
After acquisition (Notes 2, 4)
tr, tf 20% to 80% (Note 1)
tr, tf 20% to 80% (Note 1)
MIN TYP MAX UNITS
315 390 mA
1244.16
622.08
Mbps
155.52
77.76
MHz
200 1600 mVP-P
-180
VCC
- 1.49
VCC
- 1.81
VCC
- 1.83
VCC
- 1.025
VCC
- 1.085
0.73
0.73
0.83
0.81
+180
µA
200
200
VCC
- VIN/4
VCC
- 1.62
VCC
- 1.555
VCC
- 0.88
VCC
- 0.88
ps
V
V
V
13
10-10
265
200
UIP-P
Bits
ps
ps
2 _______________________________________________________________________________________


Part Number MAX3634
Description 622Mbps/1244Mbps Burst-Mode Clock Phase Aligner
Maker Maxim Integrated Products
Total Page 8 Pages
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