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Micron Technology
Micron Technology

MT2854M16B1LL Datasheet Preview

MT2854M16B1LL Datasheet

(MT2854M16B1LL / MT2854M32B1LL) FLASH MEMORY

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MT2854M16B1LL pdf
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SYNCFLASH®
MEMORY
ADVANCE
64Mb: x16, x32
SYNCFLASH MEMORY
MT28S4M16B1LL – 1 Meg x 16 x 4 banks
MT28S2M32B1LL – 512K x 32 x 4 banks
FEATURES
• 125 MHz SDRAM-compatible read timing
• Fully synchronous; all signals registered on
positive edge of system clock
• Internal pipelined operation; column address can
be changed every clock cycle
• Internal banks for hiding row access
• Programmable burst lengths:
1, 2 , 4, 8, or full page (read)
1, 2, 4, or 8 (write)
• LVTTL-compatible inputs and outputs
• 3.0V–3.6V VCC, 1.65V–1.95V VCCQ
Additional VHH hardware protect mode (RP#)
• Supports CAS latency of 1, 2, and 3
• Four-bank architecture supports true concurrent
operation with zero latency
Read any bank while programming or erasing
any other bank
• Deep power-down mode: 50µA (MAX)
Cross-compatible Flash
Operating temperature
memory
range of
-c4o0moCmtaon+d8s5eoDtCataSheet4U.com
PIN ASSIGNMENT (Top View)
90-Ball FBGA – 2 Meg x 32
123
A DQ26 DQ24 VSS
B DQ28 VccQ VSSQ
C VSSQ DQ27 DQ25
D VSSQ DQ29 DQ30
E VccQ DQ31 NC
F VSS DQM3 A3
G A4 A5 A6
H A7
A8 VccP
J CLK CKE
A9
K DQM1 RP# DNU
L VccQ DQ8 Vss
M VSS DQ10 DQ9
N VSSQ DQ12 DQ14
P DQ11 VccQ VSSQ
789
Vcc DQ23 DQ21
VccQ VSSQ DQ19
DQ22 DQ20 VccQ
DQ17 DQ18 VccQ
NC DQ16 VssQ
A2 DQM2 Vcc
A10 A0
A1
NC BA1 NC
BA0 CS# RAS#
CAS# WE# DQM0
Vcc DQ7 VSSQ
DQ6 DQ5 VccQ
DQ1 DQ3 VccQ
VccQ VSSQ DQ4
OPTIONS
• Configuration
4 Meg x 16 (1 Meg x 16 x 4 banks)
2 Meg x 32 (512K x 32 x 4 banks)
MARKING
4M16
2M32
• Read Timing (Cycle Time)
10ns (100 MHz) @ CL2
8ns (125 MHz) @ CL3
10ns (100 MHz) @ CL3
-8
-8
-10
• Package
90-ball FBGA
FG
Part Number Example:
MT28S4M16B1LLFG-8
R DQ13 DQ15 Vss
Vcc DQ0 DQ2
90-Ball FBGA – 4 Meg x 16
12
A DNU DNU
3
VSS
B DNU VccQ VSSQ
C VSSQ DNU DNU
D VSSQ DNU DNU
E VccQ DNU
NC
F VSS
MCL
A3
G A4 A5 A6
H A7
A8 VccP
789
Vcc DNU DNU
VccQ VSSQ DNU
DNU DNU VccQ
DNU DNU VccQ
NC DNU VssQ
A2 MCL Vcc
A10 A0
A1
NC BA1 NC
KEY TIMING PARAMETERS
ACCESS
SPEED CLOCK
TIME
SETUP HOLD
GRADE FREQUENCY CL = 1* CL = 2* CL = 3* TIME TIME
-8 125 MHz -
- 7ns 2ns 1ns
-10 100 MHz
-
- 7ns 2ns 1ns
-8 100 MHz - 8ns - 2ns 1ns
J CLK CKE A11
K DQM1 RP#
A9
L VccQ DQ8
Vss
M VSS DQ10 DQ9
N VSSQ DQ12 DQ14
P DQ11 VccQ VSSQ
R DQ13 DQ15 Vss
BA0 CS# RAS#
CAS# WE# DQM0
Vcc DQ7 VSSQ
DQ6 DQ5 VccQ
DQ1 DQ3 VccQ
VccQ VSSQ DQ4
Vcc DQ0 DQ2
* CL = CAS (READ) Latency
NOTE: 1. The # symbol indicates signal is active LOW.
DataShee
DataSheet644MUb:.xc16o, xm32 SyncFlash
MT28S4M16B1LL.p65 – Rev. 1, Pub. 5/02
1
©2002, Micron Technology, Inc.
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONLY AND ARE SUBJECT TO CHANGE BY
MICRON WITHOUT NOTICE. PRODUCTS ARE ONLY WARRANTED BY MICRON TO MEET MICRON’S PRODUCTION DATA SHEET SPECIFICATIONS.
DataSheet4 U .com



Micron Technology
Micron Technology

MT2854M16B1LL Datasheet Preview

MT2854M16B1LL Datasheet

(MT2854M16B1LL / MT2854M32B1LL) FLASH MEMORY

No Preview Available !

MT2854M16B1LL pdf
www.DataSheet4U.com
ADVANCE
64Mb: x16, x32
SYNCFLASH MEMORY
GENERAL DESCRIPTION
This 64Mb SyncFlash® data sheet is divided into
to be accessed. The address bits registered coincident
two major sections. The SDRAM Interface Functional
with the READ command are used to select the starting
Description details compatibility with the SDRAM
column location for the burst access.
memory, and the Flash Memory Functional Descrip-
The 64Mb devices provide for programmable read
tion specifies the symmetrical-sectored Flash architec-
burst lengths of 1, 2, 4, or 8 locations, or the full page,
ture and functional commands.
with a burst terminate option. The x16 device features
The 64Mb SyncFlash devices are nonvolatile, elec-
an 8-word internal write buffer and the x32 features an
trically sector-erasable (Flash), programmable read-
8-Dword internal write buffer that support mode regis-
only memory containing 67,108,864 bits. Each of the
ter programmed burst write compatibility of 1, 2, 4, or 8
x16’s 16,777,216-bit banks is organized as 4,096 rows
locations.
by 256 columns by 16 bits. Each of the x32’s 16,777,216-
SyncFlash memory uses an internal pipelined archi-
bit banks is organized as 2,048 rows by 256 columns by
tecture to achieve high-speed operation.
32 bits.
The 64Mb devices are designed to operate in 3.3V
The 64Mb devices are organized into 16 indepen-
VCC and 1.8V VCCQ, low-power memory systems. A deep
dently erasable blocks. To ensure that critical firmware
power-down mode is provided, along with a power-
is protected from accidental erasure or overwrite, this
saving standby mode. All inputs and outputs are
device features sixteen (x32: 128K-Dword; x16: 256K-
LVTTL-compatible.
word) hardware and software-lockable blocks.
SyncFlash memory offers substantial advances in
A four-bank architecture supports true concurrent
Flash operating performance, including the ability to
operations. A read access to any bank can occur simul-
synchronously burst data at a high data rate with auto-
taneously with a background PROGRAM or ERASE op-
matic column-address generation and the capability
eration to any other bank.
to randomly change column addresses on each clock
et4U.com SyncFlash memory has a synchronous interface (all
cycle during a burst access.
DataShee
signals are registered on the positive edge of the clock
All Flash operations are performed using either a
signal, CLK). Read accesses to the memory areDbautrasSt heet4Uh.acrodmware command sequence (HCS) or a software com-
oriented; accesses start at a selected location and con-
mand sequence (SCS). The HCS operations are used
tinue for a programmed number of locations in a pro-
by memory controllers with native SyncFlash support.
grammed sequence. Accesses begin with the registra-
Standard SDRAM controllers can use SCS operation to
tion of an ACTIVE command, followed by a READ com-
perform Flash operations.
mand. The address bits registered coincident with the
Please refer to Micron’s Web site (www.micron.com/
ACTIVE command are used to select the bank and row
syncflash) for the latest data sheet.
DataSheet4U.com
64Mb: x16, x32 SyncFlash
MT28S4M16B1LL.p65 – Rev. 1, Pub. 5/02
DataSheet4 U .com
2 Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.


Part Number MT2854M16B1LL
Description (MT2854M16B1LL / MT2854M32B1LL) FLASH MEMORY
Maker Micron Technology
Total Page 30 Pages
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