http://www.datasheet4u.com

900,000+ Datasheet PDF Search and Download

Datasheet4U offers most rated semiconductors datasheets pdf





Mitsubishi
Mitsubishi

M5M4V4405CTP-7S Datasheet Preview

M5M4V4405CTP-7S Datasheet

EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM

No Preview Available !

M5M4V4405CTP-7S pdf
MITSMUIBTSISUHBI ISLHSIsLSIs
M5M4V4405MC5JM,4TVP44-065,C-J7,T,-P6-6S,-7,,--76SS,-7S
EDOE(DHOYP(HEYRPPEARGPEAMGOEDMEO) D41E9)44310944-3B0I4T-B(1I0T4(180547865-W76O-WRDORBDY B4-YB4IT-B) DITY)NDAYMNIACMRICAMRAM
DESCRIPTION
This is a family of 1048576-word by 4-bit dynamic RAMS,
fabricated with the high performance CMOS process,and is ideal
for large-capacity memory systems where high speed, low power
dissipation , and low costs are essential.
The use of quadruple-layer polysilicon process combined with
silicide technology and a single-transistor dynamic storage stacked
capacitor cell provide high circuit density at reduced costs.
Multiplexed address inputs permit both a reduction in pins and an
increase in system densities.
Self or extended refresh current is low enough for battery
back-up application.
PIN CONFIGURATION (TOP VIEW)
DQ1 1
DQ2 2
W3
RAS 4
A9 5
26 VSS
25 DQ4
24 DQ3
23 CAS
22 OE
FEATURES
Type name
RAS CAS Address OE
access access access access
time time time time
Cycle
Power
dissipa-
time tion
(max.ns) (max.ns) (max.ns) (max.ns) (min.ns) (typ.mW)
M5M4V4405CXX-6, -6S 60 15 30 15 110 264
M5M4V4405CXX-7, -7S 70 20 35 20 130 231
XX=J, TP
Standard 26 pin SOJ, 26 pin TSOP(II)
Single 3.3V±0.3V supply
Low stand-by power dissipation
CMOS lnput level .................................................1.8mW(Max)*
CMOS lnput level ................................................180µW(Max)
Low operating power dissipation
M5M4V4405Cxx-6, -6S .....................................288.0mW (Max)
M5M4V4405Cxx-7, -7S ....................................252.0mW (Max)
Self refresh capabiility*
Self refresh current ..............................................100µA(max)
Extended refresh capability*
Extended refresh current ....................................100µA(max)
Hyper-page mode (1024-bit random access), Read-modify- write,
RAS-only refresh CAS before RAS refresh, Hidden refresh, CBR
self refresh(-6S,-7S) capabilities.
Early-write mode and OE and W to control output buffer impedance
1024 refresh cycles every 16.4ms (A0~A9)
1024refresh cycle every128ms (A0~A9)*
*: Applicable to self refresh version (M5M4V4405Cxx-6S,-7S:
option) only
APPLICATION
Lap top personal computer,Solid state disc, Microcomputer
memory, Refresh memory for CRT
A0 9
A1 10
A2 11
A3 12
VCC 13
18 A8
17 A7
16 A6
15 A5
14 A4
Outline 26P0J (300mil SOJ)
DQ1 1
DQ2 2
W3
RAS 4
A9 5
26 VSS
25 DQ4
24 DQ3
23 CAS
22 OE
A0 9
A1 10
A2 11
A3 12
VCC 13
18 A8
17 A7
16 A6
15 A5
14 A4
Outline 26P3Z-E (300mil TSOP)
PIN DESCRIPTION
Pin name
A0~A9
DQ1~DQ4
RAS
CAS
W
OE
VCC
VSS
Function
Address inputs
Data inputs / outputs
Row address strobe input
Column address strobe input
Write control input
Output enable input
Power supply (+3.3V)
Ground (0V)
1



Mitsubishi
Mitsubishi

M5M4V4405CTP-7S Datasheet Preview

M5M4V4405CTP-7S Datasheet

EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM

No Preview Available !

M5M4V4405CTP-7S pdf
MITSUBISHI LSIs
M5M4V4405CJ,TP-6,-7,-6S,-7S
EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM
FUNCTION
In addition to normal read, write, and read-modify-write operations
the M5M4V4405CJ,TP provide, a number of other functions, e.g.,
Hyper Page mode, RAS-only refresh, and delayed-write. The input
conditions for each are shown in Table 1.
Table 1 Input conditions for each mode
Operation
RAS CAS
Inputs
W OE
Row Column
address address
Read
Write (Early write)
Write (Delayed write)
Read-modify-write
RAS-only refresh
Hidden refresh
CAS before RAS refresh
Self refresh*
Stand-by
ACT
ACT
ACT
ACT
ACT
ACT
ACT
ACT
NAC
ACT
ACT
ACT
ACT
NAC
ACT
ACT
ACT
DNC
NAC
ACT
ACT
ACT
DNC
DNC
NAC
NAC
DNC
ACT
DNC
NAC
ACT
DNC
ACT
DNC
DNC
DNC
APD
APD
APD
APD
APD
DNC
DNC
DNC
DNC
APD
APD
AP
ADPD
DNC
DNC
DNC
DNC
DNC
Note : ACT : active, NAC : nonactive, DNC : don' t care, VLD : valid, IVD : Invalid, APD : applied, OPN : open
Input/Output
Refresh Remark
Input Output
OPN
APD
APD
APD
DNC
OPN
DNC
DNC
DNC
VLD
OPN
IVD
VLD
OPN
VLD
OPN
OPN
OPN
YES
YES
YES
YES
YES
YES
YES
YES
NO
Hyper
Page
mode
identical
BLOCK DIAGRAM
COLUMN ADDRESS
STROBE INPUT CAS
ROW ADDRESS RAS
STROBE INPUT
WRITE CONTROL W
INPUT
ADDRESS INPUTS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CLOCK GENERATOR
CIRCUIT
A0 ~ A9
COLUMN DECODER
ROW &
COLUMN
ADDRESS
BUFFER
A0~ ROW
A9 DECODER
SENSE REFRESH
AMPLIFER & I /O CONTROL
MEMORY CELL
(4,194,304 BITS)
(4)
DATA IN
BUFFERS
(4)
DATA OUT
BUFFERS
2
VCC (3.3V)
VSS (0V)
DQ1
DQ2
DQ3
DQ4
DATA
INPUTS /
OUTPUTS
OUTPUT
OE ENABLE
INPUT


Part Number M5M4V4405CTP-7S
Description EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM
Maker Mitsubishi
Total Page 27 Pages
PDF Download
M5M4V4405CTP-7S pdf
Download PDF File
M5M4V4405CTP-7S pdf
View for Mobile



Buy Electronic Components




Related Datasheet

1 M5M4V4405CTP-7 EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM Mitsubishi
Mitsubishi
M5M4V4405CTP-7 pdf
2 M5M4V4405CTP-7S EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM Mitsubishi
Mitsubishi
M5M4V4405CTP-7S pdf






Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z

site map

webmaste! click here

contact us

Buy Components