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MH2M365CXJ-6 Datasheet Preview

MH2M365CXJ-6 Datasheet

HYPER PAGE MODE 75497472-BIT ( 2097152-WORD BY 36-BIT ) DYNAMIC RAM

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MH2M365CXJ-6 pdf
MITSUBISHI LSIs
MH2M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 75497472-BIT ( 2097152-WORD BY 36-BIT ) DYNAMIC RAM
DESCRIPTION
The MH2M365CXJ/CNXJ is 2097152-word x 36-bits dynamic
RAM. This consists of four industry standard 1M x 16 dynamic
RAMs in SOJ and two industry 1M x 4 dyanmic RAMs in SOJ.
The mounting of SOJ on a single in-line package provides any
application where high densities and large quantities of memory
are required. This is a socket-type memory module,suitable for
easy interchange or addition of modules.
FEATURES
Type name
RAS
CAS Address Cycle Power
access access access
dissipa-
time
time time
time tion
(max.ns) (max.ns) (max.ns) (min.ns) (typ.mW)
MH2M365CXJ/CNXJ-5 50 13 25
90 2137
MH2M365CXJ/CNXJ-6 60 15 30 110 1767
MH2M365CXJ/CNXJ-7 70 20 35 130 1537
72pin single in-line package
Single 5.0V ± 10% supply
Low stand-by power dissipation
33mW (Max)
Low operating power dissipation
MH2M365CXJ/CNXJ- 5
MH2M365CXJ/CNXJ- 6
MH2M365CXJ/CNXJ- 7
CMOS lnput level
2.69W (Max)
2.22W (Max)
1.92W (Max)
Hyper-page mode , RAS-only refresh , CAS before RAS
refresh, Hidden refresh capabilities
All inputs and output directly TTL compatible
1024 refresh cycles every 16.4ms (A0 ~ A9)
APPLICATION
Main memory unit for computers, Microcomputer memory,
Refresh memory for CRT
PIN CONFIGURATION (TOP VIEW)
[Double side]
1.Vss
2.DQ0
3.DQ16
4.DQ1
5.DQ17
6.DQ2
7.DQ18
8.DQ3
11.NC
10.Vcc
11.NC
12.A0
13.A1
14.A2
15.A3
16.A4
17.A5
18.A6
37.MP1 1
2
38.MP3 3
4
39.Vss 5
6
40.CAS0
7
8
41.CAS2
9
10
42.CAS3
11
12
13
43.CAS1 14
15
44.RAS0 16
17
45.RAS1 18
19
46.NC
20
21
47.W
22
23
48.NC
24
25
26
49.DQ8 27
28
50.DQ24 29
30
51.DQ9
31
32
52.DQ25
33
34
53.DQ10
35
36
54.DQ26
19.NC 55.DQ11
20.DQ4
56.DQ27
37
38
21.DQ20
57.DQ12
39
40
22.DQ5
58.DQ28
41
42
23.DQ21 59.Vcc
43
44
45
24.DQ6 60.DQ29 46
47
25.DQ22 61.DQ13 48
49
26.DQ7 62.DQ30 50
51
27.DQ23
63.DQ14
52
53
28.A7
64.DQ31
54
55
29.NC
65.DQ15
56
57
58
30.Vcc 66.NC 59
60
31.A8 67.PD1 61
62
32.A9
68.PD2
63
64
33.RAS3 69.PD3
65
66
34.RAS2 70.PD4
67
68
35.MP2 71.NC
69
70
71
36.MP0 72.Vss 72
-5 -6 -7
PD1 NC NC NC
PD2 NC NC NC
PD3 Vss NC Vss
PD4 Vss NC NC
Outline 72N9J-C
NC: NO CONNECTION
MIT-DS-0083-1.2
MITSUBISHI
ELECTRIC
( 1 / 15 )
21/Feb./1997



Mitsubishi
Mitsubishi

MH2M365CXJ-6 Datasheet Preview

MH2M365CXJ-6 Datasheet

HYPER PAGE MODE 75497472-BIT ( 2097152-WORD BY 36-BIT ) DYNAMIC RAM

No Preview Available !

MH2M365CXJ-6 pdf
MITSUBISHI LSIs
MH2M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 75497472-BIT ( 2097152-WORD BY 36-BIT ) DYNAMIC RAM
FUNCTION
in addition to normal read, write, a number of other
functions, e.g., hyper page mode, RAS only refresh,
The input conditions for each are shown in Table 1.
Table 1 Input conditions for each mode
Operation
Read
RAS
ACT
CAS
ACT
Inputs
Row
W address
NAC
APD
Column
address
APD
Input/Output
Input
OPN
Output
VLD
Early write
ACT
ACT
ACT
APD
APD
VLD
OPN
RAS-only refresh
ACT
NAC
DNC
APD
DNC
DNC
OPN
Hidden refresh
CAS before RAS refresh
Standby
ACT
ACT
NAC
ACT
ACT
DNC
NAC
DNC
DNC
APD
DNC
DNC
DNC
DNC
DNC
OPN
DNC
DNC
VLD
OPN
OPN
Note : ACT : active, NAC : nonactive, DNC : don' t care, VLD : valid, IVD : Invalid,APD : applied, OPN : open
BLOCK DIAGRAM
RAS1
45
RAS3
33
DQ0 2
DQ1 4
DQ2 6
DQ3 8
DQ4 20
DQ5 22
DQ6 24
DQ7 26
MP0 36
DQ8 49
DQ9 51
DQ10 53
DQ11 55
DQ12 57
DQ13 61
DQ14 63
DQ15 65
MP1 37
LCAS UCAS
M5M418165CJ
LDATA
UDATA
LDATA
UDATA
M5M418165CJ
LCAS UCAS
44 40
43
RAS0 CAS0 CAS1
MIT-DS-0083-1.2
01 23
M5M44505CJ
0 1 23
0 1 23
M5M44505CJ
01 23
LCAS UCAS
M5M418165CJ
LDATA
UDATA
LDATA
UDATA
M5M418165CJ
LCAS UCAS
3 DQ16
5 DQ17
7 DQ18
9 DQ19
21 DQ20
23 DQ21
25 DQ22
27 DQ23
35 MP2
50 DQ24
52 DQ25
54 DQ26
56 DQ27
58 DQ28
60 DQ29
62 DQ30
64 DQ31
38 MP3
12 13 14 15 16 17 18 28 31 32
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
34 41 42
RAS2 CAS2 CAS3
MITSUBISHI
ELECTRIC
( 2 / 15 )
47
W
21/Feb./1997


Part Number MH2M365CXJ-6
Description HYPER PAGE MODE 75497472-BIT ( 2097152-WORD BY 36-BIT ) DYNAMIC RAM
Maker Mitsubishi
Total Page 15 Pages
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