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Mitsubishi
Mitsubishi

PS21267-AP Datasheet Preview

PS21267-AP Datasheet

Dual-In-Line Package Intelligent Power Module

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PS21267-AP pdf
PS21267
MITMSUITBSIUSBHISSHEIMSIECMOINCDOUNCDTUOCRTO<RDu<aDl-uIna-lL-Iinn-eLiPnaecPkacgkeaIgneteIlnlitgeellnigtePnotwPeorwMeor dMuoled>ule>
PS212P6S72-1P26/7A-PP/AP
TRATNRSAFNESRF-EMRO-MLDOLTDYPTEYPE
INSIUNLSAUTLEADTETDYPTEYPE
INTEGRATED POWER FUNCTIONS
600V/30A low-loss CSTBTTM inverter bridge for three
phase DC-to-AC power conversion
INTEGRATED DRIVE, PROTECTION AND SYSTEM CONTROL FUNCTIONS
• For upper-leg IGBTS :Drive circuit, High voltage high-speed level shifting, Control supply under-voltage (UV) protection.
• For lower-leg IGBTS : Drive circuit, Control supply under-voltage protection (UV), Short circuit protection (SC).
• Fault signaling : Corresponding to an SC fault (Lower-side IGBT) or a UV fault (Lower-side supply).
• Input interface : 3, 5V line compatible. (High Active)
• UL Approved : Yellow Card No. E80276
APPLICATION
AC100V~200V three-phase inverter drive for small power motor control.
Fig. 1 PACKAGE OUTLINES (Short-pin type : PS21267-P)
2.8±0.3
27×2.8(=75.6)
1 2 3 4 5 6 7 8 9 10 11 12 13
14 15 16 17 18 19 20 21
2-φ4.5±0.2
Type name , Lot No.
Refer Fig. 6 for long-pin type : PS21267-AP.
Dimensions in mm
NOTE
D Heat sink side
TERMINAL CODE
1. UP
2. VP1
3. VUFB
4. VUFS
5. VP
6. VP1
7. VVFB
8. VVFS
9. WP
10. VP1
11. VPC
12. VWFB
13. VWFS
14. VN1
15. VNC
16. CIN
17. CFO
18. FO
19. UN
20. VN
21. WN
22. P
23. U
24. V
25. W
26. N
22 23 24 25
10±0.3 10±0.3 10±0.3
67±0.3
79±0.5
B
26
20±0.3
C
A
3.8±0.2
1±0.2
C0.2
1±0.2
0.7±0.2
0.7±0.2
C0.2
0.8±0.2
0.8±0.2
0.45±0.2
0.8±0.2
0.45±0.2
0.45±0.2
(71)
Heat sink side
(2.5)
OTHERS
TERMINAL 22, 26
DETAIL B
(5 pins t = 0.7)
OTHERS
TERMINAL 1-2, 20-21
DETAIL C
(21 pins t = 0.7)
0.5±0.2
DETAIL A
DETAIL D
Note: All outer lead terminals are with Pb-free solder plating.
Oct. 2005
Free Datasheet http://www.datasheet4u.com/



Mitsubishi
Mitsubishi

PS21267-AP Datasheet Preview

PS21267-AP Datasheet

Dual-In-Line Package Intelligent Power Module

No Preview Available !

PS21267-AP pdf
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21267-P/AP
TRANSFER-MOLD TYPE
INSULATED TYPE
Fig. 2 INTERNAL FUNCTIONS BLOCK DIAGRAM (TYPICAL APPLICATION EXAMPLE)
C1 : Tight tolerance, temp-compensated electrolytic type
(Note : The capacitance value depends on the PWM control
scheme used in the applied system.)
C2 : 0.22~2µF R-category ceramic capacitor for noise filtering
Inrush current
limiter circuit
High-side input (PWM)
(3, 5V line) (Note 1, 2)
Input signal Input signal Input signal
conditioning conditioning conditioning
Level shifter Level shifter Level shifter
Protection
circuit (UV)
Protection
circuit (UV)
Protection
circuit (UV)
Drive circuit Drive circuit Drive circuit
P
C2
(Note 7)
C1
(Note 6)
DIP-IPM
AC line input
H-side IGBTS
U
(Note 4)
VM
W
C
Z
N1 N
AC line output
VNC
CIN
L-side IGBTS
Z : ZNR (Surge absorber)
C : AC filter (Ceramic capacitor 2.2~6.5nF)
(Note : Additionally, an appropriate line-to line
surge absorber circuit may become necessary
depending on the application environment.)
Input signal conditioning
Fo logic
Drive circuit
Protection
circuit
Control supply
Under-Voltage
protection
Note1:
2:
3:
4:
5:
6:
7:
Low-side input (PWM)
FO CFO
(3, 5V line) (Note 1, 2) Fault output (5V line)
(Note 3, 5)
(Note 7)
VNC
VD
(15V line)
The logic of input signal is high-active. The DIP-IPM input signal section integrates a 2.5k(min) pull-down resistor.
If using external RC filter, pay attention to satisfy the turn-on/off threshold voltage requirement.
By virtue of integrating an application specific type HVIC inside the module, direct coupling to MCU terminals without any opto-coupler or transformer
isolation is possible.
This output is open drain type. The signal line should be pulled up to the positive side of the 5V power supply with approximately 10kresistor.
The wiring between the power DC link capacitor and the P, N1 terminals should be as short as possible to protect the DIP-IPM against catastrophic high
surge voltages. For extra precaution, a small film type snubber capacitor (0.1~0.22µF, high voltage type) is recommended to be mounted close to
these P & N1 DC power input pins.
Fo output pulse width should be decided by putting external capacitor between CFO and VNC terminals. (Example : CFO=22nF tFO=1.8ms (Typ.))
High voltage (600V or more) and fast recovery type (less than 100ns) diodes should be used in the bootstrap circuit.
To prevent ICS from surge destruction, it is recommended to insert a Zener diode (24V, 1W) between each control supply terminals.
Fig. 3 EXTERNAL PART OF THE DIP-IPM PROTECTION CIRCUIT
DIP-IPM
P
Drive circuit
External protection circuit
H-side IGBTS
L-side IGBTS
Short Circuit Protective Function (SC) :
SC protection is achieved by sensing the L-side DC-Bus current (through the external
shunt resistor) after allowing a suitable filtering time (defined by the RC circuit).
When the sensed shunt voltage exceeds the SC trip-level, all the L-side IGBTs are turned
OFF and a fault signal (Fo) is output. Since the SC fault may be repetitive, it is
recommended to stop the system when the Fo signal is received and check the fault.
IC (A)
SC Protection
U Trip Level
V
W
N1
Shunt Resistor
AN
(Note 1)
CR
VNC
Drive circuit
CIN
B
Protection circuit
C
(Note 2)
Note1:
2:
In the recommended external protection circuit, please select the RC
time constant in the range 1.5~2.0µs.
To prevent erroneous protection operation, the wiring of A, B, C should
be as short as possible.
Collector current
waveform
0
2
tw (µs)
Oct. 2005
Free Datasheet http://www.datasheet4u.com/


Part Number PS21267-AP
Description Dual-In-Line Package Intelligent Power Module
Maker Mitsubishi
Total Page 10 Pages
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