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National Semiconductor Electronic Components Datasheet

LMH2180 Datasheet

75 MHz Dual Clock Buffer

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LMH2180 pdf
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January 24, 2008
LMH2180
75 MHz Dual Clock Buffer
General Description
The LMH2180 is a high speed dual clock buffer designed for
portable communications and applications requiring multiple
accurate multi-clock systems. The LMH2180 integrates two
75 MHz low noise buffers with independent shutdown pins
into a small package. The LMH2180 ensures superb system
operation between the baseband and the oscillator signal
path by eliminating crosstalk between the multiple clock sig-
nals.
Unique technology and design provides the LMH2180 with
the ability to accurately drive both large capacitive and resis-
tive loads. Low supply current combined with shutdown pins
for each channel means the LMH2180 is ideal for battery
powered applications. The LMH2180's rapid recovery after
disable optimizes performance and current consumption.
This part does not use an internal ground reference, thus pro-
viding additional system flexibility. The LMH2180 operates
both with single and split supplies.
The flexible buffers provide system designers the capacity to
manage complex clock signals in the latest wireless applica-
tions. Each buffer delivers 106 V/μs internal slew rate with
independent shutdown and duty cycle precision. The patent-
ed analog circuit of each buffer drives capacitive loads greater
than 20 pF. Each input is internally biased to 1V, removing
the need for external resistors. Both channels have rail-to-rail
inputs and outputs, a gain of one, and are AC coupled with
the use of one capacitor.
Replacing a discrete buffer solution with the LMH2180 pro-
vides many benefits: simplified board layout, minimized par-
asitic components, simplified BOM, design durability across
multiple applications, simplification of clock paths, and the
ability to reduce the number of clock signal generators in the
system. The LMH2180 is produced in the tiny 8-pin LLP solder
bump and no pullback packages minimizing the required PCB
space. National’s advanced packaging offers direct PCB-IC
evaluation via pin access.
Features
(Typical values are: VSUPPLY = 2.7V and CL = 10 pF, unless
otherwise specified.)
Small signal bandwidth
Supply voltage range
Phase noise (VIN = 1 VPP,
fC = 38.4 MHz, Δf = 1kHz)
Slew rate
Total supply current
Shutdown current
Rail-to-rail input and output
Individual buffer enable pins
Rapid Ton technology
Crosstalk rejection circuitry
8-pin LLP, pin access packaging
Temperature range
78 MHz
2.4V to 5V
-123dBc/Hz
106 V/μs
2.3 mA
30 µA
−40°C to 85°C
Applications
3G mobile applications
WLAN–WiMAX modules
TD_SCDMA multi-mode MP3 and camera
GSM modules
Oscillator modules
Typical Application
© 2008 National Semiconductor Corporation 300246
30024602
www.national.com


National Semiconductor Electronic Components Datasheet

LMH2180 Datasheet

75 MHz Dual Clock Buffer

No Preview Available !

LMH2180 pdf
www.DataShAeebt4Us.ocolmute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltages (V+– V)
ESD Tolerance
Human Body (Note 4)
Machine Model (Note 5)
Charged Device Model
Storage Temperature Range
5.5V
2000V
200V
1000V
−65°C to +150°C
Junction Temperature (Note 3)
Soldering Information
Infrared or Convection (35 sec.)
+150°C
235°C
Operating Ratings (Note 1)
Supply Voltage (V+ – V)
2.4V to 5.0V
Temperature Range (Notes 2, 3)
−40°C to +85°C
Package Thermal Resistance (Notes 2, 3)
LLP-8 (θJA)
217°C/W
2.7V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for TJ = 25°C, VDD = 2.7V, VSS = 0V, VCM = 1V, Enable1,2 = VDD, CL = 10 pF,
RL = 30 k, Load is connected to VSS, CCOUPLING = 10 nF. Boldface limits apply at temperature range extremes of operating
condition. See (Note 2)
Symbol
Parameter
Conditions
Min Typ Max Units
(Note 7) (Note 6) (Note 7)
Frequency Domain Response
SSBW
LSBW
GFN
Small Signal Bandwidth
Large Signal Bandwidth
Gain Flatness < 0.1 dB
VIN = 100 mVPP; −3 dB
VIN = 1.0 VPP; −3 dB
f > 100 kHz
78 MHz
60 MHz
4.9 MHz
Distortion and Noise Performance
φn Phase Noise
en Input-Referred Voltage Noise
ISOLATION
CT
Output to Input
Crosstalk Rejection
Time Domain Response
VIN = 1 VPP, fC = 38.4 MHz, Δf = 1 kHz
VIN = 1 VPP, fC = 38.4 MHz, Δf = 10 kHz
f = 1 MHz, RSOURCE = 50Ω
f = 1 MHz, RSOURCE = 50Ω
f = 38.4 MHz, VIN = 1 VPP
−123
−132
13
84
41
dBc/Hz
dBc/Hz
nV/
dB
dB
tr Rise Time
tf Fall Time
ts Settling Time to 0.1%
OS Overshoot
SR Slew Rate (Note 8)
Static DC Performance
0.1 VPP Step (10-90%)
1 VPP Step
0.1 VPP Step
VIN = 2 VPP
6 ns
5 ns
120 ns
37 %
106 V/µs
IS Supply Current
Enable1,2 = VDD ; No Load
2.3
2.7
2.9
mA
Enable1 = VDD , Enable2 = VSS , No
Load
1.3 1.5 mA
1.6
Enable1,2 = VSS ; No Load
41
30 46 μA
PSRR
Power Supply Rejection Ratio
DC (3.0V to 5.0V)
65 68
64
dB
ACL Small Signal Voltage Gain
VOS Output Offset Voltage
VIN = 0.2 VPP
0.95 1.0 1.05 V/V
-0.5 17 mV
18
TC VOS
Temperature Coefficient Output
Offset Voltage (Note 9)
2.8 µV/°C
ROUT
Output Resistance
f = 100 kHz
f = 38.4 MHz
0.6
166
www.national.com
2


Part Number LMH2180
Description 75 MHz Dual Clock Buffer
Maker National Semiconductor
Total Page 16 Pages
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