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  ON Semiconductor Electronic Components Datasheet  

N01S818HA Datasheet

1 Mb Ultra-Low Power Serial SRAM

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N01S818HA pdf
N01S818HA
1 Mb Ultra-Low Power
Serial SRAM
Standard SPI Interface and Multiplex
DUAL and QUAD Interface
Overview
The ON Semiconductor serial SRAM family includes several
integrated memory devices including this 1 Mb serially accessed
Static Random Access Memory, internally organized as 128 K words
by 8 bits. The devices are designed and fabricated using
ON Semiconductor’s advanced CMOS technology to provide both
high-speed performance and low power. The devices operate with a
single chip select (CS) input and use a simple Serial Peripheral
Interface (SPI) protocol. In SPI mode, a single data-in (SI) and
data-out (SO) line is used along with the clock (SCK) to access data
within the device. In DUAL mode, two multiplexed data-in/data-out
(SIO0-SIO1) lines are used and in QUAD mode, four multiplexed
data-in/data-out (SIO0-SIO3) lines are used with the clock to access
the memory.
The devices can operate over a wide temperature range of 40°C to
+85°C and are available in a 8-lead TSSOP package.
Features
Power Supply Range: 1.7 to 2.2 V
Very Low Typical Standby Current < 1 mA
Very Low Operating Current < 10 mA
Simple Serial Interface
Single-bit SPI Access
DUAL-bit and QUAD-bit SPI-like Access
Flexible Operating Modes
Word Mode
Page Mode
Burst Mode (Full Array)
High Frequency Read and Write Operation
Clock Frequency 20 MHz
Built-in Write Protection (CS High)
High Reliability
Unlimited Write Cycles
These Devices are PbFree and are RoHS Compliant
Green TSSOP
http://onsemi.com
TSSOP8 3x4.4
CASE 948BH
PACKAGE CONFIGURATION
CS
SO / SIO1
NC / SIO2
VSS
1
2
3
4
8 VCC
7 HOLD / SIO3
6 SCK
5 SI / SIO0
ORDERING INFORMATION
Device
Package
Shipping
N01S818HAT22I TSSOP8
(PbFree)
N01S818HAT22IT TSSOP8
(PbFree)
100 Units / Tube
3000 / Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Table 1. DEVICE OPTIONS
Device / Part Number
N01S818HAT22I
Power Supply
1.7 V 2.2 V
© Semiconductor Components Industries, LLC, 2013
September, 2013 Rev. 0
Speed
20 MHz
1
Package
TSSOP8
Function
HOLD
Publication Order Number:
N01S818HA/D


  ON Semiconductor Electronic Components Datasheet  

N01S818HA Datasheet

1 Mb Ultra-Low Power Serial SRAM

No Preview Available !

N01S818HA pdf
Table 2. PIN NAMES
Pin Name
CS
SCK
SI / SIO0
SO / SIO1
SC / SIO2
HOLD / SIO3
VCC
VSS
N01S818HA
Pin Function
Chip Select
Serial Clock
Data Input SPI mode
Data Input/Output 0 DUAL and QUAD mode
Data Output SPI mode
Data Input/Output 1 DUAL and QUAD mode
No Connect SPI and DUAL mode
Data Input/Output 2 QUAD mode
HOLD Input SPI and DUAL mode
Data Input/Output 3 QUAD mode
Power
Ground
SCK
CS
SI / SIO0
SO / SIO1
SIO2
HOLD / SIO3
Interface
Circuitry
Decode
Logic
Control
Logic
Data Flow
Circuitry
SRAM
Array
Figure 1. Functional Block Diagram
Table 3. CONTROL SIGNAL DESCRIPTIONS
Signal
Mode
Used
Name
Description
CS All Chip Select A low level selects the device and a high level puts the device in standby mode. If CS is brought
high during a program cycle, the cycle will complete and then the device will enter standby mode.
When CS is high, SO is in high-Z. CS must be driven low after power-up prior to any sequence
being started.
SCK
All Serial Clock Synchronizes all activities between the memory and controller. All incoming addresses, data and
instructions are latched on the rising edge of SCK. Data out is updated after the falling edge of
SCK.
SI SPI Serial Data In Receives instructions, addresses and data on the rising edge of SCK.
SO SPI Serial Data Out Data is transferred out after the falling edge of SCK.
HOLD SPI and
DUAL
Hold
A high level is required for normal operation. Once the device is selected and a serial sequence
is started, this input may be taken low to pause serial communication without resetting the serial
sequence. The pin must be brought low while SCK is low for immediate use. If SCK is not low,
the HOLD function will not be invoked until the next SCK high to low transition. The device must
remain selected during this sequence. SO is high-Z during the Hold time and SI and SCK are
inputs are ignored. To resume operations, HOLD must be pulled high while the SCK pin is low.
Lowering the HOLD input at any time will take to SO output to High-Z.
SIO0 - 1 DUAL
Serial Data
Input / Output
Receives instructions, addresses and data on the rising edge of SCK. Data is transferred out
after the falling edge of SCK. The instruction must be set after power-up to enable the DUAL
access mode.
SIO0 - 3 QUAD
Serial Data
Input / Output
Receives instructions, addresses and data on the rising edge of SCK. Data is transferred out
after the falling edge of SCK. The instruction must be set after power-up to enable the QUAD
access mode.
http://onsemi.com
2


Part Number N01S818HA
Description 1 Mb Ultra-Low Power Serial SRAM
Maker ON Semiconductor
Total Page 12 Pages
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