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PLL
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PL671-06 Datasheet Preview

PL671-06 Datasheet

(PL671-05 / -06) Programmable Spread Spectrum Clock

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PL671-06 pdf
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P(Preliminary) L671-05/-06
PicoEMITM Programmable Spread Spectrum Clock
FEATURES
Advanced programmable PLL with Spread Spectrum
Accepts reference clock input: 10-200MHz
Output frequency range: up to 166MHz @ 2.5V or
up to 200MHz @ 3.3V operation.
Programmable Spread Spectrum modulation
magnitude:
o Center Spread: ±0.125% to ±2.0% in ±0.125% steps
o Down Spread: -0.25% to -4.0% in 0.25% steps
Four pre-programmed configurations.
Spread Spectrum On/Off selection.
Programmable output drive (4mA, 8mA, 16mA)
Low Cycle to Cycle jitter.
Single 2.5V or 3.3V ± 10% power supply.
Accepts ≥0.1V reference signal input voltage.
Available in 6-pin SOT23 GREEN/RoHS compliant
packages.
PIN CONFIGURATION
DESCRIPTION
The PL671-05 and -06 are advanced programmable clock
and Spread Spectrum clock generators (PSSCG), and
members of PhaseLink’s PicoPLL™ Programmable
Clock family.
The PL671-05 and -06 offer up to 200MHz outputs, and
allow for programming the modulation type (center or down
Spread), as well as 16 modulation magnitudes (±0.125 to
±2.0% or -0.25 to -4.0%) to choose from. In addition,
the CSEL[0:1] pins can be used to toggle the device
thru 4 pre-programmed configurations. The Spread
Spectrum modulation can be turned ‘ON/OFF’, allowing for
completing a design with PL671-05/-06 and having the
assurance of turning ‘ON’ the EMI modulation, if EMI
becomes an issue. The frequency modulation of the
PL671-05 and -06 greatly reduces the fundamental
and harmonic frequencies’ peak magnitude,
therefore reducing the system level Electro Magnetic
Interference (EMI), by as much as 20dB.
BLOCK DIAGRAM
Note: ^ Denotes 60KPull-up resistor
R-Counter
9-bits
Modulation Magnitude*
CSEL[0:1]
CLK0
SST On/Off
* Optional Pre-defined
Modulation Magnitude Control
M-Counter
11-bits
P-Counter
6-bits
Odd/Even
Programmable Function
÷8
Phase
Detector
÷8
Charge
Pump
FVCO = FREF * (M/R)
FOUT = FVCO / P
Selectable
÷1 or ÷2
SST
Modulation
Loop
Filter
VCO
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 2/9/07 Page 1



PLL
PLL

PL671-06 Datasheet Preview

PL671-06 Datasheet

(PL671-05 / -06) Programmable Spread Spectrum Clock

No Preview Available !

PL671-06 pdf
www.DataSheet4U.com
P(Preliminary) L671-05/-06
PicoEMITM Programmable Spread Spectrum Clock
PACKAGE PIN ASSIGNMENT
Name
CLK0
PL671-05 PL671-06
SOT23-6L SOT23-6L
13
Type
O
Description
Programmable Clock Output with spread spectrum (SST can be
turned off).
GND 2 2 P GND connection.
FIN 3 1 I Reference input pin.
VDD
CSEL0^,
CSEL1^
4 4 P VDD connection (2.25~3.63V)
Optional, pre-programmed configuration input control pins, to
5,6 5,6 I allow switching between ‘4’ pre-defined configurations. Both pins
incorporate a 60KΩ pull up resistor.
KEY PROGRAMMING PARAMETERS
Clock
Output Frequency
SST Modulation Magnitude
(Spread Percentage)
“On the Fly“
Configuration
FOUT = FREF * M / (R * P)
where M =11 bit
R = 9 bit
P = 6 bit
CLK0= FREF, FREF /2, FOUT
* ‘P’ is a 6-bit Odd/Even
divider
16 programmable modulation
magnitudes to choose from:
Up to 4 ’On-The-Fly’
switchabe pre-defined
configurations..
Center Spread: ±0.125% to
±2.0% in ±0.125% steps
Down Spread: -0.25% to
-4.0% in 0.25% steps
CSEL[0:1]
Configuration
Selection - input
Output Drive
Strength
Three optional drive
strengths to choose
from:
Low: 4mA
Std: 8mA (default)
High: 16mA
FUNCTIONAL DESCRIPTION
PL671-05/-06 are highly featured, very flexible, advanced programmable PLL designs for high performance, low-
power Spread Spectrum modulation applications. The PL671-05/-06 accept a reference clock input of 10MHz to
200MHz and are capable of producing SST modulated outputs up to 200MHz. These flexible designs allow the
PL671-05/-06 to deliver any PLL generated frequency, FREF (Ref Clk) frequency or FREF /2 to CLK0. The use of
CSEL0 & CSEL1 allows the device to choose from up to 4 different modulation magnitude settings providing a
range of spread settings to choose from. Some of the design features of the PL671-05 are mentioned below.
PLL Programming
The PLL in the PL671-05/-06 is fully programmable.
The PLL is equipped with an 8-bit input frequency
divider (R-Counter), and an 11-bit VCO frequency
feedback loop divider (M-Counter). The output of the
PLL is transferred to a 6-bit post VCO Odd/Even
divider (P-Counter). The output frequency is
determined by the following formula
[FOUT = (FREF * M)/(R*P).
Modulation Magnitude and Type
The PL671-05/-06 provide the following
programmable capabilities for Modulation Type and
Modulation Magnitude (Spread Percentage):
Modulation
Type
Center Spread
Down Spread
Modulation
Magnitude
±0.125% thru ±2.00%
-0.25% thru -4.00%
Programming
Steps
±0.125%
-0.25%
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 2/9/07 Page 2


Part Number PL671-06
Description (PL671-05 / -06) Programmable Spread Spectrum Clock
Maker PLL
Total Page 6 Pages
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