| Description | The 85105I is a low skew, high performance 1-to-5 Differential-to0.7V HCSL Fanout Buffer. The 85105I has two selectable clock inputs. The CLK0, nCLK0 pair can accept most standard differential input levels. The single-ended CLK1 can accept LVCMOS or LVTTL input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the outputs during asynchronous assertion/ deasserti... |
| Features |
• Five 0.7V differential HCSL outputs • Selectable differential CLK0, nCLK0 or LVCMOS inputs • CLK0, nCLK0 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL • CLK1 can accept the following input levels: LVCMOS or LVTTL • Maximum output frequency: 500MHz • Translates any single-ended input signal to 3.3V HCSL levels... |
| Datasheet |
 85105I Datasheet - 380.59KB |
