OCTAL BUS BUFFER WITH 3 STATE OUTPUTS
HCT540: INVERTED - HCT541 NON INVERTED
. HIGH SPEED
tPD = 10 ns (TYP.) at VCC = 5V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) at TA = 25 oC
. COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.) VIL = 0.8V (MAX.)
. OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 6 mA (MIN)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. PIN AND FUNCTION COMPATIBLE
ORDER CODES :
The M54/74HCT540 and HCT541 are high speed
CMOS OCTAL BUS BUFFERS (3-STATE)
fabricated in silicon gate C2MOS technology. They
have the same high speed performance of LSTTL
combined with true CMOS low power consumption.
The HCT540 is an inverting buffer and HCT541 is a
non inverting buffer.
The 3 STATE control gate operates as a two input
AND such that if either G1 and G2 are high, all eight
outputs are in the high impedance state. In order to
enhance PC board layout, the HCT540 and
HCT541 offers a pinout having inputs and outputs
on opposite sides of the package. All inputs are
equipped with protection circuits against static
discharge and transient excess voltage.
This integrated circuit has input and output
characteristics that are fully compatible with 54/74
LSTTL logic families. M54/74HCT devices are
designed to directly interface HSC2MOS systems
with TTL and NMOS components. They are also
plug in replacements for LSTTL devices giving a
reduction of power consumption.
IT IS PROHIBITED TO APPLY A SIGNAL TO BUS
TERMINAL WHEN IT IS IN OUTPUT MODE.
WHEN A BUS TERMINAL IS FLOATING (HIGH
IMPEDANCE STATE) IT IS REQUESTED TO FIX
THE INPUT LEVEL BY MEANS OF EXTERNAL
PULL DOWN OR PULL UP RESISTOR.
PIN CONNECTION (top view)