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AN239 Datasheet

Expanding ADC1 Dyanmic Range

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AN239
EXPANDING ADC1 DYNAMIC RANGE FOR THE Si8250
1. Introduction
The Si8250 data sheet specifies a common mode input range of 0.6 to 1.2 V for ADC1. This range effectively limits
the dynamic voltage output range in voltage-controlled converters. For example, the output range for a 3.3 V power
supply designed to generate a 1.00 V sense would have an absolute maximum dynamic range of 1.98 to 3.96 V. In
reality, the active regulation point would need to be something greater than 1.98 V and less than 3.96 V since these
are on the very fringes of the common mode specification. If a design requires wider dynamic output voltage range
(e.g., 2.00–5.70 V) then a simple resistor divider will not work. This application note discusses a simple and
inexpensive solution to expand the dynamic range for applications such as power factor correction and wide
variable output power supplies.
2. ADC1 Common Mode Limits
The specified common mode range for ADC1 (Figure 1) is from 0.6 V to the voltage reference which is typically
1.2 V. This simply means that the input voltages to ADC1 from both VSENSE and the REFDAC should stay within
the range of 0.6 to 1.2 V referenced to the common ground to achieve good linear response. For input voltages
much lower than the common mode specification, ADC1 exhibits non-linear characteristics. Figure 2 shows an
example of the ADC1 dc response when the inputs are significantly out of specification. For input voltages above
the common mode range the input is effectively “cut off” yielding no change in the ADC output.
VSENSE
200 kHz
12-Bit
ADC
+Bits [11:6] -
+ Bits [8:3]
REFDAC0H
REFDAC0L
+
10 MHz
6-Bit
- ADC
6
REFDAC
9
6
-1
ADC1DAT
1
0 6 To PID Filter
2
3
PID Input
MUX
SFR Bus
READ/WRITE
REFDAC0H
REFDAC0L
Figure 1. ADC1 Block Diagram
ADC1 Output
6 mV Step, VSENSE = 301 mV, VREF = 1.226 V
-32
-22
-12
-2
8
18
28
0 50 100 150 200
REFDAC
Actual Data
Ideal Data
Figure 2. ADC1 Results Below the Common Mode Specification
Rev. 0.1 11/05
Copyright © 2005 by Silicon Laboratories
AN239



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Expanding ADC1 Dyanmic Range

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3. Dynamic Range Limit
The simplest and most economical feedback approach is to divide the output voltage with a simple resistor divider
as shown in Figure 3.
VIN
The Power
Stage and Filter
VOUT
Rs
VSENSE
Si8250
Vs
Rx
Figure 3. Resistor Divider
Thus, the output voltage is proportional to the inverted resistor divider ratio, Equation 2, times the sense voltage as
shown in Equation 1. For simplicity, the inverted resistor divider ratio from this point forward will be referred to as
the α ratio.
Vo = αVs
Equation 1. Output Voltage/Sense Voltage Relation
α = R-----s--R--+---x--R----x-
Equation 2. Inverted Resistor Divider Ratio
Similarly, it is easily shown that the range of the output voltage is proportional by the α ratio to the range of the
sense voltage, and this is where fundamental limits can be seen. The range of the sense voltage is bounded by the
common mode input specification, Vs = 1.2–0.6 V = 0.6 V.
Voh Vol = αVshαVsl → ∆Vo = α∆Vs
Equation 3. Output / Sense Dynamic Range Relation
For example, the operating range for a particular design is 2.2 to 5.5 V with 200 mV of operating margin on either
side. Thus, the absolute range of the supply is defined to be 2.0 to 5.7 V. However, starting with the minimum
sense voltage at the minimum output voltage, the maximum achievable output voltage is 2.0 V + α∆Vs = 4.0 V. At
an output of 4.0 V, the sense voltage is at its maximum limit of 1.2 V. This graphical relationship is shown in
Figure 4. Thus the desired 5.7 V maximum range is not achievable with the feedback circuit shown in Figure 3.
5.7 V
4.0 V
VOUT
2.0 V
Out of Range
Within the Common
Mode Range
1.2 V
VS
0.6 V
0V 0V
Figure 4. Output Voltage Limit
2 Rev. 0.1


Part Number AN239
Description Expanding ADC1 Dyanmic Range
Maker Silicon
Total Page 10 Pages
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