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Simtek
Simtek

STK25C48 Datasheet Preview

STK25C48 Datasheet

CMOS Nonvolatile Static RAM

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STK25C48 pdf
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STK25C48
2K x 8 AutoStore™ nvSRAM
QuantumTrap™ CMOS
Nonvolatile Static RAM
Obsolete - Not Recommend for new Designs
FEATURES
• Nonvolatile Storage without Battery Problems
• Directly Replaces 2K x 8 Static RAM, Battery-
Backed RAM or EEPROMs
• 25ns, 35ns and 45ns Access Times
STORE to Nonvolatile Elements Initiated by
AutoStore™ on Power Down
RECALL to SRAM Initiated by Power Restore
• 10mA Typical ICC at 200ns Cycle Time
• Unlimited READ, WRITE and RECALL Cycles
• 1,000,000 STORE Cycles to Nonvolatile Ele-
ments
• 100-Year Data Retention over Full Industrial
Temperature Range
• Commercial and Industrial Temperatures
• 24-Pin 600 PDIP Package
DESCRIPTION
The STK25C48 is a fast SRAM with a nonvolatile element
incorporated in each static memory cell. The SRAM can
be read and written an unlimited number of times, while
independent nonvolatile data resides in the Nonvolatile
Elements. Data transfers from the SRAM to the Nonvola-
tile Elements (the STORE operation) can take place auto-
matically on power down using charge stored in system
capacitance. Transfers from the Nonvolatile Elements to
the SRAM (the RECALL operation) take place automati-
cally on restoration of power. The nvSRAM can be used in
place of existing 2K x 8 SRAMs and also matches the
pinout of 2K x 8 battery-backed SRAMs, EPROMs and
EEPROMs, allowing direct substitution while enhancing
performance. No support circuitry is required for micro-
processor interfacing.
BLOCK DIAGRAM
QUANTUM TRAP
32 x 512
A5 STORE
A6 STATIC RAM
A7
ARRAY
RECALL
A8 32 x 512
A9
STORE/
RECALL
CONTROL
VCC
POWER
CONTROL
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
COLUMN I/O
COLUMN DEC
A0 A1 A2 A3 A4 A10
G
E
W
PIN CONFIGURATIONS
1 24
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ
2
3
4
5
6
7
8
9
10
11
12
23
22
21
20
19
18
17
16
15
14
13
PIN NAMES
VCC
A8
A9
W
G
A10
E
DQ7
DQ6
DQ5
DQ4
DQ3 24 - 600 PDIP
A0 - A10
W
DQ0 - DQ7
E
G
VCC
VSS
Address Inputs
Write Enable
Data In/Out
Chip Enable
Output Enable
Power (+ 5V)
Ground
March 2006
1 Document Control # ML0005 rev 0.2



Simtek
Simtek

STK25C48 Datasheet Preview

STK25C48 Datasheet

CMOS Nonvolatile Static RAM

No Preview Available !

STK25C48 pdf
STK25C48
ABSOLUTE MAXIMUM RATINGSa
Voltage on Input Relative to Ground . . . . . . . . . . . . . .–0.5V to 7.0V
Voltage on Input Relative to VSS . . . . . . . . . . –0.6V to (VCC + 0.5V)
Voltage on DQ0-7. . . . . . . . . . . . . . . . . . . . . . –0.5V to (VCC + 0.5V)
Temperature under Bias . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W
DC Output Current (1 output at a time, 1s duration) . . . . . . . . 15mA
Note a:
Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at condi-
tions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rat-
ing conditions for extended periods may affect reliability.
DC CHARACTERISTICS
(VCC = 5.0V ± 10%)
SYMBOL
ICC1b
PARAMETER
Average VCC Current
ICC2c
ICC3b
ICC4c
ISB1d
ISB2d
IILK
IOLK
VIH
VIL
VOH
VOL
TA
Average VCC Current during STORE
Average VCC Current at tAVAV = 200ns
5V, 25°C, Typical
Average VCAP Current during
AutoStore™ Cycle
Average VCC Current
(Standby, Cycling TTL Input Levels)
VCC Standby Current
(Standby, Stable CMOS Input Levels)
Input Leakage Current
Off-State Output Leakage Current
Input Logic “1” Voltage
Input Logic “0” Voltage
Output Logic “1” Voltage
Output Logic “0” Voltage
Operating Temperature
COMMERCIAL
MIN MAX
85
75
65
3
10
INDUSTRIAL
MIN MAX
90
75
65
3
10
UNITS
mA
mA
mA
mA
mA
2 2 mA
25 26 mA
21 22 mA
18 19 mA
1.5 1.5 mA
±1 ±1 μA
±5 ±5
2.2
VSS – .5
2.4
VCC + .5 2.2
0.8 VSS – .5
2.4
VCC + .5
0.8
0.4 0.4
0 70 –40 85
μA
V
V
V
V
°C
NOTES
tAVAV = 25ns
tAVAV = 35ns
tAVAV = 45ns
All Inputs Don’t Care, VCC = max
W (V CC – 0.2V)
All Others Cycling, CMOS Levels
All Inputs Don’t Care
tAVAV = 25ns, E VIH
tAVAV = 35ns, E VIH
tAVAV = 45ns, E VIH
E (V CC – 0.2V)
All Others VIN 0.2V or (VCC – 0.2V)
VCC = max
VIN = VSS to VCC
VCC = max
VIN = VSS to VCC, E or G VIH
All Inputs
All Inputs
IOUT = – 4mA
IOUT = 8mA
Note b: ICC1 and ICC3 are dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.
Note c: ICC2 and ICC4 are the average currents required for the duration of the respective STORE cycles (tSTORE ) .
Note d: E VIH will not produce standby current levels until any nonvolatile cycle in progress has timed out.
AC TEST CONDITIONS
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 3V
Input Rise and Fall Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤ 5ns
Input and Output Timing Reference Levels . . . . . . . . . . . . . . . 1.5V
Output Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Figure 1
5.0V
480 Ohms
CAPACITANCEe (TA = 25°C, f = 1.0MHz)
SYMBOL
CIN
COUT
PARAMETER
Input Capacitance
Output Capacitance
MAX
8
7
UNITS
pF
pF
CONDITIONS
ΔV = 0 to 3V
ΔV = 0 to 3V
Note e: These parameters are guaranteed but not tested.
OUTPUT
255 Ohms
30 pF
INCLUDING
SCOPE AND
FIXTURE
Figure 1: AC Output Loading
March 2006
2Document Control # ML0005 rev 0.2


Part Number STK25C48
Description CMOS Nonvolatile Static RAM
Manufacturer Simtek
Total Page 10 Pages
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