http://www.datasheet4u.com

900,000+ Datasheet PDF Search and Download

Datasheet4U offers most rated semiconductors datasheets pdf





Sirenza Microdevices
Sirenza Microdevices

SGA-8343Z Datasheet Preview

SGA-8343Z Datasheet

LOW NOISE HIGH GAIN SIGE HBT

No Preview Available !

SGA-8343Z pdf
Product Description
Sirenza Microdevices’ SGA-8343 is a high performance Silicon
Germanium Heterostructure Bipolar Transistor (SiGe HBT)
designed for operation from DC to 6 GHz. The SGA-8343 is
optimized for 3V operation but can be biased at 2V for low-voltage
battery operated systems. The device provides high gain, low NF,
and excellent linearity at a low cost. It can be operated at very low
bias currents in applications where high linearity is not required.
The matte tin finish on Sirenza’s lead-free package utilizes a post
annealing process to mitigate tin whisker formation and is RoHS
compliant per EU Directive 2002/95. This package is also
manufactured with green molding compounds that contain no
antimony trioxide nor halogenated fire retardants.
40
35
30
25
20
15
10
5
0
0
Typical Performance - 3V, 10mA
NFMIN
Gmax
Gain
123 4567
Frequency (GHz)
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0
8
SGA-8343
SGA-8343Z Pb RoHS Compliant
& Green Package
Preliminary
Low Noise, High Gain SiGe HBT
Product Features
• Now Available in Lead Free, RoHS
Compliant, & Green Packaging
• DC-6 GHz Operation
• 0.9 dB NFMIN @ 0.9 GHz
• 24 dB Gmax @ 0.9 GHz
• |GOPT|=0.10 @ 0.9 GHz
• OIP3 = +28 dBm, P1dB = +9 dBm
• Low Cost, High Performance, Versatility
Applications
• Analog and Digital Wireless Systems
• 3G, Cellular, PCS, RFID
• Fixed Wireless, Pager Systems
• Driver Stage for Low Power Applica-
tions
• Oscillators
Symbol
Device Characteristics
Test Conditions
VCE=3V, ICQ=10mA, 25°C
(unless otherwise noted)
Test Frequency
Units
Min.
Typ.
Max.
GMAX
Maximum Available Gain
ZS=ZS*, ZL=ZL*
0.9 GHz
1.9 GHz
2.4 GHz
dB
23.9
19.3
17.7
NF Minimum Noise Figure
ZS=GammaOPT, ZL=ZL*
0.9 GHz
1.9 GHz
2.4 GHz
dB
0.94
1.10
1.18
S21 Insertion Gain[1]
NF Noise Figure[2]
ZS=ZL= 50 Ohms
LNA Application
Circuit Board
0.9 GHz
1.9 GHz
dB
21.0
22.0
23.0
dB
1.40
1.75
Gain
Gain[2]
LNA Application
Circuit Board
1.9 GHz
dB
15.5
16.5
17.5
OIP3
Output Third Order Intercept Point[2]
LNA Application
Circuit Board
1.9 GHz
dBm
25.8
27.8
P1dB
Output 1dB Compression Point[2]
LNA Application
Circuit Board
1.9 GHz
dBm
7.5
9.0
hFE
BVCEO
Rth
DC Current Gain
Collector-Emitter Breakdown Voltage
Thermal Resistance
junction-to-lead
V
oC/W
120
5.7
180
6.0
200
300
VCE Operating Voltage
ICE Operating Current
collector-emitter
collector-emitter
V 4.0
mA 50
[1] 100% tested - Insertion gain tested using a 50 ohm contact board (no matching circuitry) during final production test.
[2] Sample tested - Samples pulled from each wafer/package lot. Sample test specifications are based on statistical data from sample test measurements. The test fixture is
an engineering application circuit board (parts are pressed down on the circuit board). The application circuit represents a trade-off between the optimal noise match and
input return loss.
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions. Sirenza Microdevices assumes no responsibility for the use of this
information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or
granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems.
Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 Technology Court, Broomfield, CO 80021
Phone: (800) SMI-MMIC
http://www.sirenza.com
1 EDS-101845 Rev F



Sirenza Microdevices
Sirenza Microdevices

SGA-8343Z Datasheet Preview

SGA-8343Z Datasheet

LOW NOISE HIGH GAIN SIGE HBT

No Preview Available !

SGA-8343Z pdf
SGA-8343 Low Noise SiGe HBT
Junction Temperature Calculation
MTTF is inversely proportional to the device junction
temperature. For junction temperature and MTTF consid-
erations the device operating conditions should also
satisfy the following expression:
PDC < (TJ - TL) / RTH
where:
PDC = ICE * VCE (W)
TJ = Junction Temperature (C)
TL = Lead Temperature (pin 2) (C)
RTH = Thermal Resistance (C/W)
Biasing Details
The SGA-8343 should be biased through a dropping resistor
or with active bias circuitry to prevent thermal runaway and
combat Beta variation. For passive biasing it is recommended
that the voltage drop be at least 20% of VCE. A voltage
divider from collector-to-base is preferred over a simple
series resistor. The effect of Beta variation can be minimized
by bleeding ~10*IB through the shunt resistor.
Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
Collector Current
ICE 72 mA
Base Current
IB 1 mA
Collector - Emitter Voltage VCE 5 V
Collector - Base Voltage
VCB 12 V
Emitter - Base Voltage
VEB 4.5 V
RF Input Power
PIN 5 dBm
Storage Temperature Range
Tstor -40 to +150 C
Power Dissipation
PDISS
350
mW
Operating Junction Temperature
TJ
+150
C
Operation of this device beyond any one of these limits may cause
permanent damage. For reliable continuous operation, the device
voltage and current must not exceed the maximum operating values
specified in the table on page 1.
Typical Performance - Engineering Application Circuits (See App Note AN-044)
Freq
(GHz)
0.90
1.575
1.90
2.40
Vs
(V)
5.0
3.3
5.0
3.3
VCE ICQ NF Gain P1dB OIP3[3] S11 S22
(V) (mA) (dB) (dB) (dBm) (dBm) (dB) (dB)
Comments
3.0 12 1.25 18.2 9 27.3 -16 -18 series feedback
2.7 10 1.25 15.7 6.8 26.5 -10 -25
see AN-061
3.0 12 1.4 16.5 9 27.8 -9 -24
2.7 10 1.6 14.4 9 27.5 -13 -24
[3] POUT= 0 dBm per tone, 1MHz tone spacing
Refer to the application note for additional RF data, PCB layouts, BOMs, biasing instructions, and other key
issues to be considered. For the latest application note please visit our site at www.sirenza.com.
Peak RF Performance Under Optimum Matching Conditions
Freq
VCE
ICQ
NFMIN [4]
Gmax
P1dB [5]
OIP3 [6]
(GHz)
(V) (mA)
(dB)
(dB)
(dBm)
(dBm)
2 10 0.90 23.7
0.90
3 10 0.94 23.9
2 10 1.05 19.1
1.90
3 10 1.10 19.3
2 10 1.15 17.4
2.40
3 10 1.18 17.7
10
13
10
13
10
13
25
29
25
29
25
29
B
ZSOPT
C
ZLOPT
E
[4] ZS=ΓOPT, ZL=ZL*, The input matching circuit losses have been de-emebedded.
[5] ZS=ZSOPT, ZL=ZLOPT, where ZSOPT and ZLOPT have been tuned for max P1dB (current allowed to drive-up with constant VCE)
[6] ZS=ZSOPT, ZL=ZLOPT, where ZSOPT and ZLOPT have been tuned for max OIP3
Note: Optimum NF, P1dB, and OIP3 performance cannot be achieved simultaneously.
303 Technology Court, Broomfield, CO 80021
Phone: (800) SMI-MMIC
2
http://www.sirenza.com
EDS-101845 Rev F


Part Number SGA-8343Z
Description LOW NOISE HIGH GAIN SIGE HBT
Maker Sirenza Microdevices
Total Page 4 Pages
PDF Download
SGA-8343Z pdf
Download PDF File
[partsNo] view html
View PDF for Mobile






Related Datasheet

1 SGA-8343 Low Noise/ High Gain SiGe HBT ETC
ETC
SGA-8343 pdf
2 SGA-8343X Reliability Qualification Report Stanford Microdevices
Stanford Microdevices
SGA-8343X pdf
3 SGA-8343Z LOW NOISE  HIGH GAIN SIGE HBT
HIGH GAIN SIGE HBT
SGA-8343Z pdf
4 SGA-8343Z LOW NOISE HIGH GAIN SIGE HBT Sirenza Microdevices
Sirenza Microdevices
SGA-8343Z pdf






Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z

site map

webmaste! click here

contact us

Buy Components