Vertical DMOS FET
►► Low threshold - 2.0V max.
►► High input impedance
►► Low input capacitance - 50pF typical
►► Fast switching speeds
►► Low on-resistance
►► Free from secondary breakdown
►► Low input and output leakage
►► Logic level interfaces – ideal for TTL and CMOS
►► Solid state relays
►► Battery operated systems
►► Photo voltaic drives
►► Analog switches
►► General purpose line drivers
►► Telecom switches
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally-induced
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
TN0106N3-G P005 TO-92
-G denotes a lead (Pb)-free / RoHS compliant package.
Contact factory for Wafer / Die availablity.
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.
Absolute Maximum Ratings
Operating and storage temperature -55OC to +150OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
Typical Thermal Resistance
SiTN YY = Year Sealed
0 1 0 6 WW = Week Sealed
= “Green” Packaging
Package may or may not include the following marks: Si or