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Supertex  Inc
Supertex Inc

TN2106 Datasheet Preview

TN2106 Datasheet

N-Channel Enhancement-Mode Vertical DMOS FETs

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TN2106 pdf
TN2106
N-Channel Enhancement-Mode
Vertical DMOS FET
Features
Free from secondary breakdown
Low power drive requirement
Ease of paralleling
Low CISS and fast switching speeds
Excellent thermal stability
Integral source-drain diode
High input impedance and high gain
Complementary N- and P-channel devices
Applications
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo-voltaic drives
Analog switches
General purpose line drivers
Telecom switches
General Description
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
Ordering Information
Device
Package Option
TO-236AB (SOT-23)
TO-92
BVDSS/BVDGS
(V)
TN2106
TN2106K1-G
-G indicates package is RoHS compliant (‘Green’)
TN2106N3-G
60
Pin Configurations
RDS(ON)
(max)
(Ω)
2.5
VGS(th)
(max)
(V)
2.0
Absolute Maximum Ratings
Parameter
Value
Drain-to-source
Drain-to-gate
Gate-to-source
BVDSS
BVDGS
±20V
Operating and storage temperature -55OC to +150OC
Soldering temperature*
300OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
DRAIN
GATE
SOURCE
TO-236AB (SOT-23) (K1)
DRAIN
SOURCE
GATE
TO-92 (N3)
Product Marking
N1LW
W = Code for week sealed
= “Green” Packaging
TO-236AB (SOT-23) (K1)
TN
2106
YYWW
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
TO-92 (N3)
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com



Supertex  Inc
Supertex Inc

TN2106 Datasheet Preview

TN2106 Datasheet

N-Channel Enhancement-Mode Vertical DMOS FETs

No Preview Available !

TN2106 pdf
TN2106
Thermal Characteristics
Package
(continIDuous)
(mA)
TO-236AB (SOT-23)
280
TO-92
300
Notes:
† ID (continuous) is limited by max rated Tj .
ID
(pulsed)
(A)
0.8
1.0
Power Dissipation
@TA = 25OC
(W)
0.36
0.74
θjc
(OC/W)
200
125
θja
(OC/W)
350
170
IDR
(mA)
280
300
IDRM
(A)
0.8
1.0
Electrical Characteristics (TA = 25OC unless otherwise specified)
Sym Parameter
Min Typ Max Units Conditions
BVDSS Drain-to-source breakdown voltage
60 - - V VGS = 0V, ID = 1.0mA
VGS(th) Gate threshold voltage
0.6 - 2.0 V VGS = VDS, ID = 1.0mA
ΔVGS(th) Change in VGS(th) with temperature
- -3.8 -5.5 mV/OC VGS = VDS, ID = 1.0mA
IGSS Gate body leakage
- 0.1 100 nA VGS = ± 20V, VDS = 0V
IDSS Zero gate voltage drain current
- - 1.0
VGS = 0V, VDS = Max Rating
-
-
100
µA VDS = 0.8Max Rating,
VGS = 0V, TA = 125OC
ID(ON) On-state drain current
0.6 - - A VGS = 10V, VDS = 25V
RDS(ON) Static drain-to-source on-state resistance
- - 5.0 Ω VGS = 4.5V, ID = 200mA
- - 2.5
VGS = 10V, ID = 500mA
ΔRDS(ON) Change in RDS(ON) with temperature
- 0.70 1.0 %/OC VGS = 10V, ID = 500mA
GFS Forward transductance
150 400
- mmho VDS = 25V, ID = 500mA
CISS
COSS
CRSS
Input capacitance
Common source output capacitance
Reverse transfer capacitance
- 35 50
VGS = 0V,
- 17 25 pF VDS = 25V,
- 7.0 8.0
f = 1.0MHz
td(ON)
tr
td(OFF)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
- 3.0 5.0
- 5.0 8.0
VDD = 25V,
-
6.0 9.0
ns ID = 0.5A,
RGEN = 25Ω
- 5.0 8.0
VSD Diode forward voltage drop
- 1.2 1.8
V VGS = 0V, ISD = 500mA
trr Reverse recovery time
- 400 -
ns VGS = 0V, ISD = 500mA
Notes:
1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
10V
INPUT
0V 10%
t(ON)
90%
t(OFF)
td(ON)
tr
td(OFF)
tF
VDD
OUTPUT
0V
10%
90%
10%
90%
PULSE
GENERATOR
RGEN
INPUT
VDD
RL
OUTPUT
D.U.T.
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
2


Part Number TN2106
Description N-Channel Enhancement-Mode Vertical DMOS FETs
Maker Supertex Inc
Total Page 6 Pages
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