TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
Hex Bus Buffer
Note: The JEDEC SOP (FN) is not available in
The TC74VHC367 and 368 are advanced high speed CMOS
HEX BUS BUFFERs fabricated with silicon gate C2MOS
They achieve the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
They contain six buffers; four buffers are controlled by an
enable input ( G1 ), and the other two buffers are controlled by
another enable input ( G2 ). The outputs of each buffer group are
enabled when G1 and/or G2 inputs are held low; if held high,
these outputs are in a high impedance state.
The TC74VHC367 is a non-inverting output type, while the
TC74VHC368 is an inverting output type.
An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
• High speed: tpd = 3.8 ns (typ.) at VCC = 5 V
• Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Power down protection is provided on all inputs.
• Balanced propagation delays: tpLH ∼− tpHL
• Wide operating voltage range: VCC (opr) = 2 V to 5.5 V
• Low noise: VOLP = 0.8 V (max)
• Pin and function compatible with 74ALS367/368
: 0.18 g (typ.)
: 0.13 g (typ.)
: 0.06 g (typ.)
: 0.02 g (typ.)