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Vitesse Semiconductor
Vitesse Semiconductor

VSC9210 Datasheet Preview

VSC9210 Datasheet

2.488 Gbits/sec SONET/SDH FEC Encoder and Decoder (CODEC) Chipset

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VSC9210 pdf
VITESSE
SEMICONDUCTOR CORPORATION
dvance Product Information
VSC9210
2.488 Gbits/sec SONET/SDH
FEC Encoder and Decoder (CODEC) Chipset
Features
• Reed-Solomon Encoding and Decoding using a
(255,241) code
• Realizes a Decoder Output BER of 10-20 for Input
BER of 10-5
• Processes Data rates up to 2.654 Gbps and Infor-
mation rates to 2.488 Gbps
• Device pin configured as stand-alone Encoder,
Decoder, or Bypass with clocks disabled
• Provides a dedicated user defined data channel at
10.368 Mbps
• Provides count of correctable 0’s and 1’s that are
in error in prior Code Word
• Operable at OC-48, OC-12, OC-3 rates
• Interfaces directly with Vitesse OC-48 rate
components
• PECL and TTL I/O
• Telecom Temperature range: 0 - 85C Case
• Maximum power 1.05W (Encoder), 2.82W
(Decoder @ 10-5 Input BER), 0.74W
(Bypass)
• +3.3V Power Supply
• Thermally Enhanced 208 PQFP Package
VSC9210 Block Diagram
VCXO_CLK+/-
DATAIN[15:0]+/-
INCLK+/-
USER_CHANNEL[7:0]
FEC Bypass
RS Encoder
Phase
Detector
VCXO_UPN
VCXO_DOWNN
UP_TRI
DOWN_TRI
PD_REF
VCXO_REF
DATAOUT[15:0]+/-
LOOP_CLK+/-
MODE
BYPASS
RESET
REFRAME
TST_CTL[1:0]
FEC
Framer
RS Decoder
LOCK FP
Error Monitor
OUTCLK+/-
USER_CLK
ECC_FLAG
ECC[5:0]
G52256-0, Rev. 2.3
5/17/00
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 1



Vitesse Semiconductor
Vitesse Semiconductor

VSC9210 Datasheet Preview

VSC9210 Datasheet

2.488 Gbits/sec SONET/SDH FEC Encoder and Decoder (CODEC) Chipset

No Preview Available !

VSC9210 pdf
VITESSE
SEMICONDUCTOR CORPORATION
2.488 Gbits/sec SONET/SDH
FEC Encoder and Decoder (CODEC) Chipset
Advance Product Information
VSC9210
Functional Overview
The device utilizes two 16 bit differential PECL I/O ports to interface with a high speed Multiplexer and a
Demultiplexer. For the Encoder, the 1:16 Demultiplexer is used to convert the incoming 2.5 Gbps STS-48 infor-
mation to a 16 bit parallel data at 155 MHz to interface with the VSC9210. After the encoding process, the 16 bit
parallel output data from the VSC9210 is obtained at 165 MHz and is converted to a 2.65 Gbps data stream using
the 16:1 Multiplexer. In the case of the Decoder configuration, the Demultiplexer operates on a 2.65 Gbps data
stream while the Multiplexer provides the 2.5 Gbps STS-48 information stream. Clock dividers are incorporated
within the VSC9210 to provide control of an external PLL circuit for synthesizing the necessary reference clock
for the Multiplexer. In the case of the Bypass mode, the input and output rates are identical and both the Multi-
plexer and Demultiplexer operate at 2.5 Gbps. See Figure 1 for System Diagram detail.
The User Channel is an 8 bit TTL interface operating at 1.296 MHz resulting in an aggregate data rate of
10.368 Mbps. This data channel is encoded and decoded along with the 16-bit STS data, i.e. errors occurring in
this User Channel are also corrected.
The VSC9210 can be operated at or below unencoded and encoded data rates of 155Mbs and 165Mbs
respectively. The ratio of the two input clocks (INCLK and OUTCLK) must be 15/16 for Encoder operation, and
16/15 for Decoder operation.
Page 2
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 805/388-3700 FAX: 805/987-5896
G52256-0, Rev. 2.3
5/17/00


Part Number VSC9210
Description 2.488 Gbits/sec SONET/SDH FEC Encoder and Decoder (CODEC) Chipset
Maker Vitesse Semiconductor
Total Page 10 Pages
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