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Zarlink Semiconductor
Zarlink Semiconductor

MT8961 Datasheet Preview

MT8961 Datasheet

Integrated PCM Filter Codec

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MT8961 pdf
ISO2-CMOS MT8960/61/62/63/64/65/66/67
Integrated PCM Filter Codec
Data Sheet
Features
• ST-BUScompatible
• Transmit/Receive filters & PCM Codec in one I.C
• Meets AT&T D3/D4 and CCITT G711 and G712
µ-Law: MT8960/62/64/67
• A-Law: MT8961/63/65/67
• Low power consumption:
Op.: 30 mW typ.
Stby.: 2.5 mW typ.
• Digital Coding Options:
MT8964/65/66/67 CCITT Code
MT8960/61/62/63 Alternative Code
• Digitally controlled gain adjust of both filters
• Analog and digital loopback
• Filters and codec independently user accessible
for testing
• Powerdown mode available
• 2.048 MHz master clock input
• Up to six uncommitted control outputs
±5 V ±5% power supply
February 2005
Ordering Information
MT8960/61/64/65AE
MT8962/63AE
MT8962/63/66/67AS
MT8963ASR
MT8960AE1
MT8962/63AE1
MT8962AS1
MT8963AS1
18 Pin PDIP
20 Pin PDIP
20 Pin SOIC
20 Pin SOIC
18 Pin PDIP*
20 Pin PDIP*
20 Pin SOIC*
20 Pin SOIC*
*Pb Free Matte Tin
-40°C to +85°C
Tubes
Tubes
Tubes
Tape & Reel
Tubes
Tubes
Tubes
Tubes
Description
Manufactured in ISO2-CMOS, these integrated
filter/codecs are designed to meet the demanding
performance needs of the digital telecommunications
industry, e.g., PABX, Central Office, Digital telephones.
ANUL
VX
SD0
SD1
SD2
SD3
SD4
SD5
Transmit
Filter
Output
Register
Analog to
Digital PCM
Encoder
Output
Register
A Register
8-Bits
B-Register
8-Bits
Control
Logic
DSTo
CSTi
CA
F1i
C2i
VR
Receive
Filter
PCM Digital
to Analog
Decoder
Input
Register
DSTi
VRef GNDA GNDD VDD VEE
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003-2005, Zarlink Semiconductor Inc. All Rights Reserved.



Zarlink Semiconductor
Zarlink Semiconductor

MT8961 Datasheet Preview

MT8961 Datasheet

Integrated PCM Filter Codec

No Preview Available !

MT8961 pdf
MT8960/61/62/63/64/65/66/67
Data Sheet
CSTi
DSTi
C2i
DSTo
VDD
F1i
CA
SD3
SD2
MT8960/61/64/65
1 18 GNDD
2 17 VRef
3 16 GNDA
4 15 VR
5 14 ANUL
6 13 VX
7 12 VEE
8 11 SD0
9 10 SD1
18 PIN PDIP
MT8962/63/66/67
CSTi
DSTi
C2i
DSTo
VDD
SD5
SD4
F1i
CA
SD3
1
2
3
4
5
6
7
8
9
10
20 GNDD
19 VRef
18 GNDA
17 VR
16 ANUL
15 VX
14 VEE
13 SD0
12 SD1
11 SD2
20 PIN PDIP/SOIC
Figure 2 - Pin Connections
Pin Description
Pin Name
Description
CSTi
DSTi
C2i
DSTo
VDD
F1i
CA
Control ST-BUS In is a TTL-compatible digital input used to control the function of the filter/codec.
Three modes of operation may be effected by applying to this input a logic high (VDD), logic low
(GNDD), or an 8-bit serial word, depending on the logic states of CA and F1i.
Functions controlled are: powerdown, filter gain adjust, loopback, chip testing, SD outputs.
Data ST-BUS In accepts the incoming 8-bit PCM word. Input is TTL-compatible.
Clock Input is a TTL-compatible 2.048 MHz clock.
Data ST-BUS Out is a three-state digital output driving the PCM bus with the outgoing 8-bit PCM
word.
Positive power Supply (+5 V).
Synchronization Input is an active low digital input enabling (in conjunction with CA) the PCM input,
PCM output and digital control input. It is internally sampled on every positive edge of the clock, C2i,
and provides frame and channel synchronization.
Control Address is a three-level digital input which enables PCM input and output and determines
into which control register (A or B) the serial data, presented to CSTi, is stored.
SD3
SD4-5
SD0-2
VEE
VX
ANUL
VR
GNDA
VRef
GNDD
System Drive Output is an open drain output of an N-channel transistor which has its source tied to
GNDA. Inactive state is open circuit.
System Drive Outputs are open drain outputs of N-channel transistors which have their source tied
to GNDD. Inactive state is open circuit.
System Drive Outputs are “Totempole“ CMOS outputs switching between GNDD and VDD. Inactive
state is logic low.
Negative power supply (-5 V).
Voice Transmit is the analog input to the transmit filter.
Auto Null is used to integrate an internal auto-null signal. A 0.1 µF capacitor must be connected
between this pin and GNDA.
Voice Receive is the analog output of the receive filter.
Analog ground (0 V).
Voltage Reference input to D to A converter.
Digital ground (0 V).
2
Zarlink Semiconductor Inc.


Part Number MT8961
Description Integrated PCM Filter Codec
Maker Zarlink Semiconductor
Total Page 30 Pages
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