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Zarlink Semiconductor
Zarlink Semiconductor

ZL50063 Datasheet Preview

ZL50063 Datasheet

16K-Channel Digital Switch

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ZL50063 pdf
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ZL50063
16K-Channel Digital Switch with High Jitter
Tolerance, Single Rate (32Mbps),
and 32 Inputs and 32 Output
Data Sheet
Features
• 16,384-channel x 16,384-channel non-blocking
unidirectional switching.The Backplane and Local
inputs and outputs can be combined to form a
non-blocking switching matrix with 32 input
streams and 32 output streams
• 8,192-channel x 8,192-channel non-blocking
Backplane input to Local output stream switch
• 8,192-channel x 8,192-channel non-blocking
Local input to Backplane output stream switch
• 8,192-channel x 8,192-channel non-blocking
Backplane input to Backplane output switch
• 8,192-channel x 8,192-channel non-blocking
Local input to Local output stream switch
• Backplane port accepts 16 input and 16 output
ST-BUS streams with data rate of 32.768Mbps
• Local port accepts 16 input and 16 output ST-
BUS streams with data rate of 32.768Mbps
• Exceptional input clock jitter tolerance (14ns)
• Per-stream bit delay for Local and Backplane
input streams
• Per-stream advancement for Local and
Backplane output streams
November 2003
Ordering Information
ZL50063GAC 196-Ball PBGA
-40°C to +85°C
• Constant 2-frame throughput delay for frame
integrity
• Per-channel high impedance output control for
Local and Backplane streams
• Per-channel driven-high output control for Local
and Backplane streams
• Per-channel message mode for Local and
Backplane output streams
• Connection memory block programming for fast
device initialization
• Automatic selection between ST-BUS and GCI-
Bus operation
• Non-multiplexed Motorola microprocessor
interface
VDD_IO VDD_CORE
VSS (GND)
RESET
ODE
BSTi0-15
Backplane Data Memories
(4,096 channels)
Local
Interface
LSTi0-15
BSTo0-15
Backplane
Interface
Backplane
Connection Memory
(4,096 locations)
Local
Connection Memory
(4,096 locations)
Local
Interface
LSTo0-15
BORS
FP8i
C8i
Input
Timing Unit
PLL
Local Data Memories
(4,096 channels)
Microprocessor Interface
and Internal Registers
Output
Timing
Unit
Test Port
LORS
FP8o
FP16o
C8o
C16o
VDD_PLL
DS CS R/W A14-0 DTA D15-0 TMS TDi TDo TCK TRST
Figure 1 - ZL50063 Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved.



Zarlink Semiconductor
Zarlink Semiconductor

ZL50063 Datasheet Preview

ZL50063 Datasheet

16K-Channel Digital Switch

No Preview Available !

ZL50063 pdf
ZL50063
• Conforms to the mandatory requirements of the IEEE-1149.1 (JTAG) standard
• Memory Built-In-Self-Test (BIST), controlled via microprocessor register
• 1.8V core supply voltage
• 3.3V I/O supply voltage
• 5V tolerant inputs, outputs and I/Os
Applications
• Central Office Switches (Class 5)
• Media Gateways
• Class-independent switches
• Access Concentrators
• Scalable TDM-Based Architectures
• Digital Loop Carriers
Data Sheet
2
Zarlink Semiconductor Inc.


Part Number ZL50063
Description 16K-Channel Digital Switch
Maker Zarlink Semiconductor
Total Page 30 Pages
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ZL50063 pdf
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