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BL02. For precise diagrams, and layout, please refer to the original PDF.
Core Logic %/ ® $0,+* PLFURQ &026 *DWH $UUD Description BL02 is a tristate bus latch that stores the final binary level on the bus when left undriven. Logic Symbol...
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res the final binary level on the bus when left undriven. Logic Symbol Truth Table Pin Loading BL02 IO N/A Equivalent Load IO 1.6 Equivalent Gates ................... 5.0 HDL Syntax Verilog .................... BL02 inst_name (IO); VHDL...................... inst_name: BL02 port map (IO); Size And Power Characteristics Parameter Value Static IDD (TJ = 85°C) EQLpd See page 2-15 for power equation. TBD 16.