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DF221 - CMOS Gate Array

General Description

DF221 is a static, master-slave, multiplexed scan D flip-flop.

SET is asynchronous and active low.

Output is unbuffered and changes state on the rising edge of the clock.

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Datasheet Details

Part number DF221
Manufacturer AMI
File Size 32.47 KB
Description CMOS Gate Array
Datasheet download datasheet DF221 Datasheet

Full PDF Text Transcription for DF221 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for DF221. For precise diagrams, and layout, please refer to the original PDF.

Core Logic ') ® $0,+*  PLFURQ &026 *DWH $UUD Description DF221 is a static, master-slave, multiplexed scan D flip-flop. SET is asynchronous and active low. Output ...

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tiplexed scan D flip-flop. SET is asynchronous and active low. Output is unbuffered and changes state on the rising edge of the clock. Logic Symbol DF221 DS C SD SE Q Truth Table C ↑ ↑ ↑ ↑ X L D SD SE SN HX L H LXLH XHHH X LHH XXXL XXXH NC = No Change Q H L H L H NC Pin Loading Equivalent Load C 1.0 D 1.0 SD 1.0 SE 2.1 SN 2.1 Equivalent Gates ................... 11.0 HDL Syntax Verilog .................... DF221 inst_name (Q, C, D, SD, SE, SN); VHDL...................... inst_name: DF221 port map (Q, C, D, SD, SE, SN); Size And Power Characteristics Parameter Value Static IDD (TJ = 85°C) EQLpd See page 2-15 for power equat

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