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DF231 - CMOS Gate Array

General Description

DF231 is a static, master-slave, multiplexed scan D flip-flop.

SET and RESET are asynchronous and active low.

Output is unbuffered and changes state on the rising edge of the clock.

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Datasheet Details

Part number DF231
Manufacturer AMI
File Size 34.66 KB
Description CMOS Gate Array
Datasheet download datasheet DF231 Datasheet

Full PDF Text Transcription for DF231 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for DF231. For precise diagrams, and layout, please refer to the original PDF.

') ® $0,+*  PLFURQ &026 *DWH $UUD Description DF231 is a static, master-slave, multiplexed scan D flip-flop. SET and RESET are asynchronous and active low. Output ...

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an D flip-flop. SET and RESET are asynchronous and active low. Output is unbuffered and changes state on the rising edge of the clock. Logic Symbol DF231 DS C SD SE R Q Truth Table C D RN ↑HH ↑LH ↑XH ↑XH XX L XXH XX L L XH NC = No Change SD SE SN Q X LHH XLHL HHHH L HH L XXHL XX LH X X L IL X X H NC IL = Illegal Condition Pin Loading Equivalent Load C 1.0 D 1.0 RN 2.1 SD 1.0 SE 2.1 SN 2.1 Core Logic Equivalent Gates ................... 12.0 HDL Syntax Verilog .................... DF231 inst_name (Q, C, D, RN, SD, SE, SN); VHDL......................