Datasheet4U Logo Datasheet4U.com

IID4 - CMOS Gate Array

This page provides the datasheet information for the IID4, a member of the IID1 CMOS Gate Array family.

Description

IIDx is a family of non-inverting clock drivers with a single output.

📥 Download Datasheet

Datasheet preview – IID4

Datasheet Details

Part number IID4
Manufacturer AMI
File Size 24.07 KB
Description CMOS Gate Array
Datasheet download datasheet IID4 Datasheet
Additional preview pages of the IID4 datasheet.

📁 Similar Datasheet

Other Datasheets by AMI
  • IID1 - CMOS Gate Array
  • IID2 - CMOS Gate Array
  • IID3 - CMOS Gate Array
  • IID6 - CMOS Gate Array

Full PDF Text Transcription

Click to expand full text
Core Logic ,,'[ $0,+*  PLFURQ &026 *DWH $UUD Description IIDx is a family of non-inverting clock drivers with a single output. Logic Symbol Truth Table IIDx AQ AQ AQ LL HH HDL Syntax Verilog .................... IIDx inst_name (Q, A); VHDL...................... inst_name: IIDx port map (Q, A); Pin Loading Pin Name A IID1 1.0 Equivalent Loads IID2 IID3 IID4 1.0 2.1 2.1 Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) IID1 1.0 IID2 2.0 TBD TBD 2.3 3.8 IID3 3.0 TBD 5.5 IID4 3.0 IID6 4.0 TBD TBD 7.6 11.0 a. See page 2-15 for power equation. IID6 2.1 3-124 ® ® Propagation Delays (ns) Conditions: TJ = 25°C, VDD = 5.
Published: |