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ODCSXE04 - CMOS Gate Array

General Description

ODCSXExx is a family of 4 to 16 mA, non-inverting, CMOS-level, tristate output buffer pieces with active low enables and controlled slew rate outputs.

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Datasheet Details

Part number ODCSXE04
Manufacturer AMI
File Size 25.25 KB
Description CMOS Gate Array
Datasheet download datasheet ODCSXE04 Datasheet

Full PDF Text Transcription for ODCSXE04 (Reference)

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2'&6;([[ ® $0,+*  PLFURQ &026 *DWH $UUD Description ODCSXExx is a family of 4 to 16 mA, non-inverting, CMOS-level, tristate output buffer pieces with active low enabl...

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rting, CMOS-level, tristate output buffer pieces with active low enables and controlled slew rate outputs. Logic Symbol Truth Table ODCSXExx EN SL A PADM EN A PADM LL L LH H HX Z HDL Syntax Verilog .................... ODCSXExx inst_name (PADM, A, EN); VHDL...................... inst_name: ODCSXExx port map (PADM, A, EN); Pin Loading Pin Name A (eq-load) EN (eq-load) PADM (pF) ODCSXE04 2.3 6.9 4.94 Power Characteristics Cell Output Drive (mA) ODCSXE04 4 ODCSXE08 8 ODCSXE12 12 ODCSXE16 16 a. See page 2-15 for power equation. ODCSXE08 2.3 6.9 4.94 Load ODCSXE12 2.3 6.9 4.94 ODCSXE16 2.3 6.9 4.