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ODTSXE08 - CMOS Gate Array

Download the ODTSXE08 datasheet PDF. This datasheet also covers the ODTSXE04 variant, as both devices belong to the same cmos gate array family and are provided as variant models within a single manufacturer datasheet.

General Description

ODTSXExx is a family of 4 to 24 mA, non-inverting, TTL-level, tristate output buffer pieces with active low enables and controlled slew rate outputs.

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Note: The manufacturer provides a single datasheet file (ODTSXE04-AMI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number ODTSXE08
Manufacturer AMI
File Size 25.87 KB
Description CMOS Gate Array
Datasheet download datasheet ODTSXE08 Datasheet

Full PDF Text Transcription for ODTSXE08 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for ODTSXE08. For precise diagrams, and layout, please refer to the original PDF.

2'76;([[ ® $0,+*  PLFURQ &026 *DWH $UUD Description ODTSXExx is a family of 4 to 24 mA, non-inverting, TTL-level, tristate output buffer pieces with active low enable...

View more extracted text
rting, TTL-level, tristate output buffer pieces with active low enables and controlled slew rate outputs. Logic Symbol Truth Table ODTSXExx EN A SL PADM EN A PADM LL L LH H HX Z HDL Syntax Verilog .................... ODTSXExx inst_name (PADM, A, EN); VHDL...................... inst_name: ODTSXExx port map (PADM, A, EN); Pin Loading Pin Name A (eq-load) EN (eq-load) PADM (pF) ODTSXE04 2.3 6.9 4.94 Power Characteristics Cell Output Drive (mA) ODTSXE04 4 ODTSXE08 8 ODTSXE12 12 ODTSXE16 16 ODTSXE24 24 a. See page 2-15 for power equation. ODTSXE08 2.3 6.9 4.94 Load ODTSXE12 2.3 6.9 4.94 ODTSXE16 2.3 6.9 4.

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