A8351601 reader equivalent, bar code reader.
n 80C32 CPU core n Build in 64K byte OTP ROM n Build in 8K byte external SRAM (0000H - 1FFFH), can be disable by SFR n Fully pin compatible with standard 8051 family inte.
(2) Delete “the only exit from power down is a hardware reset” on page 32
Issue Date
June 5, 2000 June 22, 2000
Remark
Preliminary
0.2 0.3
Modify 44L QFP package outline drawing and dimensions Modify PWM function (1) Add PWM3 delay control bits D.
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