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ARTS CHIP

MC74HC164 Datasheet Preview

MC74HC164 Datasheet

8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS

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MC74HC164
8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS
z Wide Operating Voltage Range of 2 V to 6V
z Outputs Can Drive Up To 10 LSTTL Loads
z Low Power Consumption, 80- A Max ICC
z Typical t pd =20 ns
z 4-mA Output Drive at 5V
z Low Input Current of 1 A Max
z AND-Gated (Enable/Disable) Serial Inputs
z Fully Buffered Clock and Serial Inputs
z Direct Clear
Description/ordering information
These 8-bit shift registers feature AND-gated serial inputs
and an asynchronous clear (CLR) input. The gated serial (A
and B) input permit complete control over incoming data; a
low at either input inhibits entry of the new data and resets
the first flip-flop to the low level at the next clock (CLK) pulse.
A high-level input enables the other input, which then
determines the state of the first flip-flop. Data at the serial
inputs can be changed while CLK is high or low, provided the
minimum setup time requirements are met. Clocking occurs
on the low-to-high-level transition of CLK.
MC54HC164…J OR W PACKAGE
MC74HC164…AD,N,NS, OR PW PACKAGE
(TOP VIEW)
MC54HC164…FK PACKAGE
(TOP VIEW)
NC-No Internal connection
TA
-40 to 85
-55 to 125
PDIP –AN
PDIP –N
SOIC - D
SOP –NS
TSSOP – PW
CDIP – J
CFP – W
LCCC - FK
ORDERING INFORMATION
PACKAGE
ORDERABLE
PARTNUMBER
Tube of 25
MC74HC164 AN
Tube of 25
MC74HC164N
Tube of 50
MC74HC164AD
Reel of 2500
MC74HC164AD
Reel of 250
MC74HC164DT
Reel of 2000
MC74HC164NSR
Tube of 90
MC74HC164PW
Reel of 2000
MC74HC164PWR
Reel of 250
MC74HC164PWT
Tube of 25
MC54HC164J
Tube of 150
MC54HC164W
Tube of 55
MC54HC164FK
TOP-SIDE
MARKING
MC74HC164 AN
MC74HC164N
HC164
HC164
HC164
MCJ54HC164J
MCJ54HC164W
MCJ54HC164FK
www.artschip.com
1




ARTS CHIP

MC74HC164 Datasheet Preview

MC74HC164 Datasheet

8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS

No Preview Available !

MC74HC164
8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS
FUNCTION TABLE
INPUTS
OUTPUTS
CLK
A
L XX
B QA
XL
QB…QH
LL
H L X X QAO QBO QHO
H H HH
QAn QGn
H LX L
QAn QGn
H X L L
QAn QGn
QA0, QB0,QH0 = the level of QA, QB, or QH, respectively,
before the indicated steady-state input conditions were
established
QAn, QGn = the level of QA or QG before the most recent
transition of CLK: indicates a 1-bit shift
logic diagram (positive logic)
Pin numbers shown are for the AD,J,N,NS, PW, and W packages.
www.artschip.com
2


Part Number MC74HC164
Description 8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS
Maker ARTS CHIP
Total Page 13 Pages
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