AT89LP51ID2 Datasheet | Atmel

Features - 8-bit Microcontroller patible with 8051 Products - Enhanced 8051 Architecture - Single Clock Cycle per Byte Fetch - 12 Clock per Machine Cycle patibility Mode - Up to 20 MIPS Throughput at 20 MHz Clock Frequency - Fully Static Operation: 0 Hz to 20 MHz - On-chip 2-cycle Hardware Multiplier - 16x16 Multiply- Accumulate Unit - 256 x 8 Internal RAM - On-chip 2KB Expanded RAM (ERAM) - Software Selectable Size (0, 256, 512, 768, 1024, 1792, 2048 Bytes) - Dual Data Pointers - 4-level Interrupt Priority - Nonvolatile Program and Data Memory - 64KB of In-System Programmable (ISP) Flash Program Memory - 4KB of EEPROM (AT89LP51ED2/ID2 Only) - 512-byte User Signature Array - Endurance: 10,000 Write/Erase Cycles - Serial Interface for Program Downloading - 2KB Boot ROM Contains Low Level Flash Programming Routines and a Default Serial Bootloader - Peripheral Features - Three 16-bit Enhanced Timer/Counters - Seven 8-bit PWM Outputs - 16-bit Programmable Counter Array - High Speed Output, pare/Capture - Pulse Width Modulation, Watchdog Timer Capabilities - Enhanced UART with Automatic Address Recognition and Framing Error Detection - Enhanced Master/Slave SPI with Double-buffered...