AT90S1200 Description
Features Utilizes the AVR® RISC Architecture AVR High-performance and Low-power RISC Architecture 89 Powerful Instructions Most Single Clock Cycle Execution 32 x 8 General Purpose Working Registers Up to 12 MIPS Throughput at 12 MHz Data and Non-volatile Program Memory 1K Byte of In-System Programmable Flash Endurance: 1,000 Write/Erase Cycles 64 Bytes of In-System Programmable EEPROM Endurance: 100,000 Write/Erase...
AT90S1200 Key Features
- Utilizes the AVR® RISC Architecture
- High-performance and Low-power RISC Architecture
- 89 Powerful Instructions
- Most Single Clock Cycle Execution
- 32 x 8 General Purpose Working Registers
- Up to 12 MIPS Throughput at 12 MHz
- Data and Non-volatile Program Memory
- 1K Byte of In-System Programmable Flash
- 64 Bytes of In-System Programmable EEPROM
- Programming Lock for Flash Program and EEPROM Data Security