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Atmel Electronic Components Datasheet

45DB011 Datasheet

AT45DB011

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Features
Single 2.7V - 3.6V Supply
Serial Interface Architecture
Page Program Operation
– Single Cycle Reprogram (Erase and Program)
– 512 Pages (264 Bytes/Page) Main Memory
Optional Page and Block Erase Operations
One 264-Byte SRAM Data Buffer
Internal Program and Control Timer
Fast Page Program Time – 7 ms Typical
120 µs Typical Page to Buffer Transfer Time
Low-Power Dissipation
– 4 mA Active Read Current Typical
– 2 µA CMOS Standby Current Typical
13 MHz Max Clock Frequency
Hardware Data Protection Feature
Serial Peripheral Interface (SPI) Compatible – Modes 0 and 3
CMOS and TTL Compatible Inputs and Outputs
Commercial and Industrial Temperature Ranges
Description
The AT45DB011 is a 2.7-volt only, serial interface Flash memory suitable for in-sys-
tem reprogramming. Its 1,081,344 bits of memory are organized as 512 pages of 264
bytes each. In addition to the main memory, the AT45DB011 also contains one SRAM
data buffer of 264 bytes. Unlike conventional Flash memories that are accessed ran-
domly with multiple address lines and a parallel interface, the DataFlash uses a serial
interface to sequentially access its data. The simple serial interface facilitates hard-
(continued)
Pin Configurations
SOIC
Pin Name
CS
SCK
SI
Function
Chip Select
Serial Clock
Serial Input
SI
SCK
RESET
CS
1
2
3
4
8 SO
7 GND
6 VCC
5 WP
SO Serial Output
WP
Hardware Page
Write Protect Pin
RESET
Chip Reset
RDY/BUSY Ready/Busy
PLCC
TSSOP Top View
Type 1
SCK
SI
SO
NC
NC
NC
NC
NC
NC
5
6
7
8
9
10
11
12
13
29 WP
28 RESET
27 RDY/BUSY
26 NC
25 NC
24 NC
23 NC
22 NC
21 NC
RDY/BUSY
RESET
WP
VCC
GND
SCK
SO
1
2
3
4
5
6
7
14 CS
13 NC
12 NC
11 NC
10 NC
9 NC
8 SI
Note: PLCC package pins 16
and 17 are DON’T CONNECT
1-Megabit
2.7-volt Only
Serial
DataFlash®
AT45DB011
Preliminary
AT45DB011
Preliminary 16-
Megabit 2.7-volt
Only Serial
DataFlash
Rev. 1103C–08/98
1


Atmel Electronic Components Datasheet

45DB011 Datasheet

AT45DB011

No Preview Available !

ware layout, increases system reliability, minimizes switch-
ing noise, and reduces package size and active pin count.
The device is optimized for use in many commercial and
industrial applications where high density, low pin count,
low voltage, and low power are essential. Typical applica-
tions for the DataFlash are digital voice storage, image
storage, and data storage. The device operates at clock
frequencies up to 13 MHz with a typical active read current
consumption of 4 mA.
To allow for simple in-system reprogrammability, the
AT45DB011 does not require high input voltages for pro-
gramming. The device operates from a single power sup-
ply, 2.7V to 3.6V, for both the program and read
operations. The AT45DB011 is enabled through the chip
select pin (CS) and accessed via a three-wire interface
consisting of the Serial Input (SI), Serial Output (SO), and
the Serial Clock (SCK).
All programming cycles are self-timed, and no separate
erase cycle is required before programming.
Block Diagram
WP FLASH MEMORY ARRAY
PAGE (264 BYTES)
BUFFER (264 BYTES)
SCK
CS
RESET
VCC
GND
RDY/BUSY
I/O INTERFACE
SI SO
Memory Array
To provide optimal flexibility, the memory array of the
AT45DB011 is divided into three levels of granularity com-
prising of sectors, blocks, and pages. The Memory Archi-
tecture Diagram illustrates the breakdown of each level and
details the number of pages per sector and block. All pro-
gram operations to the DataFlash occur on a page by page
basis; however, the optional erase operations can be per-
formed at the block or page level.
2 AT45DB011


Part Number 45DB011
Description AT45DB011
Maker ATMEL Corporation
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45DB011 Datasheet PDF






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ATMEL Corporation





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