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Atmel Electronic Components Datasheet

AT25FS040 Datasheet

High Speed Small Sectored SPI Flash Memory

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Features
Serial Peripheral Interface (SPI) Compatible
Supports SPI Modes 0 (0,0) and 3 (1,1)
– Datasheet describes Mode 0 Operation
50 MHz Clock Rate
Byte Mode and Page Mode Program (1 to 256 Bytes) Operations
Sector/Block/Page Architecture
– Sixteen 256 byte Pages per Sector
– Sixteen 4 Kbyte Sectors per Block
– Eight uniform 64 Kbyte Blocks
Self-timed Sector, Block and Chip Erase
Product Identification Mode with JEDEC Standard
Low-voltage Operation
– 2.7V (VCC = 2.7V to 3.6V)
Hardware and Software Write Protection
– Device protection with Write Protect (WP) Pin
– Write Enable and Write Disable Instructions
– Software Write Protection:
Upper 1/64, 1/32, 1/16, 1/8, 1/4, 1/2 or Entire Array
Flexible Op Codes for Maximum Compatibility
Self-timed Program Cycle
– 30 µs/Byte Typical
Single Cycle Reprogramming (Erase and Program) for Status Register
High Reliability
– Endurance: 10,000 Write Cycles Typical
8-lead JEDEC 150mil SOIC and 8-lead Ultra Thin Small Array Package (SAP)
High Speed
Small Sectored
SPI Flash
Memory
4M (524,288 x 8)
AT25FS040
Description
www.DataSheet4U.com
The AT25FS040 provides 4,194,304 bits of serial reprogrammable Flash memory
organized as 524,288 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage operation
are essential. The AT25FS040 is available in a space-saving 8-lead JEDEC SOIC and
8-lead Ultra Thin SAP packages.
Table 1. Pin Configuration
Pin Name
Function
CS Chip Select
SCK
Serial Data Clock
SI Serial Data Input
SO Serial Data Output
GND
Ground
VCC
Power Supply
WP Write Protect
HOLD
Suspends Serial
Input
8-lead JEDEC SOIC
CS
SO
WP
GND
1
2
3
4
8 VCC
7 HOLD
6 SCK
5 SI
8-lead SAP
__V_C_C_ 8
HOLD 7
SCK 6
___
1 CS
2 _S_O_
3 WP
SI 5
4 GND
Bottom View
Advance
Information
5107D–SFLSH–09/06


Atmel Electronic Components Datasheet

AT25FS040 Datasheet

High Speed Small Sectored SPI Flash Memory

No Preview Available !

The AT25FS040 is enabled through the Chip Select pin (CS) and accessed via a 3-wire
interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock
(SCK). All write cycles are completely self-timed.
BLOCK WRITE protection for upper 1/64, 1/32, 1/16, 1/8, 1/4, 1/2 or the entire memory
array is enabled by programming the status register. Separate write enable and write
disable instructions are provided for additional data protection. Hardware data protec-
tion is provided via the WP pin to protect against inadvertent write attempts to the status
register. The HOLD pin may be used to suspend any serial communication without
resetting the serial sequence.
Absolute Maximum Ratings*
Operating Temperature....................................–40°C to +85°C
Storage Temperature .....................................–65°C to +150°C
Voltage on Any Pin
with Respect to Ground .................................... –1.0V to +5.0V
Maximum Operating Voltage ............................................ 4.2V
DC Output Current........................................................ 5.0 mA
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
Figure 1. Block Diagram
524,288 x 8
2 AT25FS040
5107D–SFLSH–09/06


Part Number AT25FS040
Description High Speed Small Sectored SPI Flash Memory
Maker ATMEL Corporation
Total Page 23 Pages
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