Datasheet Summary
Features
- Single 2.7V
- 3.6V Supply
- Serial Peripheral Interface (SPI) patible
- Supports SPI Modes 0 and 3
- 66 MHz Maximum Clock Frequency
- Flexible, Uniform Erase Architecture
- 4-Kbyte Blocks
- 32-Kbyte Blocks
- 64-Kbyte Blocks
- Full Chip Erase
- Individual Sector Protection with Global Protect/Unprotect Feature
- Sixteen 128-Kbyte Physical Sectors
- Hardware Controlled Locking of Protected Sectors
- Flexible Programming
- Byte/Page Program (1 to 256 Bytes)
- Automatic Checking and Reporting of Erase/Program Failures
- JEDEC Standard Manufacturer and Device ID Read Methodology
- Low Power Dissipation
- 7 mA Active Read Current (Typical)
- 4 µA Deep Power-Down Current (Typical)
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