Datasheet Summary
Features
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100% patible to AT45DB081 Single 2.7V
- 3.6V Supply Serial Interface Architecture Page Program Operation
- Single Cycle Reprogram (Erase and Program)
- 4096 Pages (264 Bytes/Page) Main Memory Optional Page and Block Erase Operations Two 264-byte SRAM Data Buffers
- Allows Receiving of Data while Reprogramming of Nonvolatile Memory Continuous Read Capability through Entire Array Internal Program and Control Timer Low Power Dissipation
- 4 mA Active Read Current Typical
- 2 µA CMOS Standby Current Typical 13 MHz Max Clock Frequency Hardware Data Protection Feature Serial Peripheral Interface (SPI) patible
- Modes 0 and 3 CMOS and TTL patible...
