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UT54ACS109E Datasheet PDF

Aeroflex UT54ACS109E

The UT54ACS109E is a dual J-K positive triggered flip-flop. When preset and clear are inactive (high), data at the J and K input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. The flip-flops can perform as toggle flip-flops by grounding K and tying J high.
Part No. UT54ACS109E
Datasheet UT54ACS109E Download
Manufacturer
Aeroflex
Description Dual J-K Flip-Flops
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UT54ACS109E datasheet page 1 preview

FEATURES

● 0.6μm CRH CMOS Process - Latchup immune
● High speed
● Low power consumption
● Wide operating power supply of 3.0V to 5.5V
● Available QML Q or V processes
● 16-lead flatpack

DESCRIPTION

A low level at the preset or clear inputs sets or resets the outputs regardless of the other input levels. Following the hold time interval, data at the J and K input can be changed without affecting the levels at the outputs. They also can perform as D flip-flops if J and K are tied together. The devices are characterized over full HiRel temperature range of -55°C to +125°C. FUNCTION TABLE PRE L H L H H H H H INPUTS CLR CLK HX LX LX H↑ H↑ H↑ H↑ HL OUTPUT JK Q Q XX H L XX L H X X H1 H1 LL L H HL Toggle L H No Change HH H L X X No Change Note: 1. The output levels in this configuration are not guaranteed to meet the mini- mum levels for VOH if the lows at preset and clear are near VIL maximum. In addition, this configuration is nonstable; that is, it will not persist when either preset or clear returns to its inactive (high) level.
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