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UT54ACS279 - Quadruple S-R Latches

General Description

The UT54ACS279 and the UT54ACTS279 contain four basic S-R flip-flop latches.

Under conventional operation, the S-R inputs are normally held high.

When the S input is pulsed low, the Q output will be set high.

Key Features

  • ‰ 1.2μ CMOS - Latchup immune ‰ High speed ‰ Low power consumption ‰ Single 5 volt supply ‰ Available QML Q or V processes ‰ Flexible package - 16-pin DIP - 16-lead flatpack ‰ UT54ACS279- SMD 5962-96580 ‰ UT54ACTS279 - SMD 5962-96581.

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Datasheet Details

Part number UT54ACS279
Manufacturer Aeroflex Circuit Technology
File Size 224.92 KB
Description Quadruple S-R Latches
Datasheet download datasheet UT54ACS279 Datasheet

Full PDF Text Transcription for UT54ACS279 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for UT54ACS279. For precise diagrams, and layout, please refer to the original PDF.

Standard Products UT54ACS279/UT54ACTS279 Quadruple S-R Latches Datasheet November 2010 www.aeroflex.com/logic FEATURES ‰ 1.2μ CMOS - Latchup immune ‰ High speed ‰ Low pow...

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com/logic FEATURES ‰ 1.2μ CMOS - Latchup immune ‰ High speed ‰ Low power consumption ‰ Single 5 volt supply ‰ Available QML Q or V processes ‰ Flexible package - 16-pin DIP - 16-lead flatpack ‰ UT54ACS279- SMD 5962-96580 ‰ UT54ACTS279 - SMD 5962-96581 DESCRIPTION The UT54ACS279 and the UT54ACTS279 contain four basic S-R flip-flop latches. Under conventional operation, the S-R inputs are normally held high. When the S input is pulsed low, the Q output will be set high. When R is pulsed low, the Q output will be reset low. If the S-R inputs are taken low simultaneously, the Q output is unpredictable. The devices are characte