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UT54ACTS109 - Radiation-Hardened Dual J-K Flip-Flops

Download the UT54ACTS109 datasheet PDF. This datasheet also covers the UT54ACS109 variant, as both devices belong to the same radiation-hardened dual j-k flip-flops family and are provided as variant models within a single manufacturer datasheet.

Description

The UT54ACS109 and the UT54ACTS109 are dual J-K positive triggered flip-flops.

A low level at the preset or clear inputs sets or resets the outputs regardless of the other input levels.

Features

  • radiation-hardened CMOS - Latchup immune High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package - 16-pin DIP - 16-lead flatpack.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (UT54ACS109_AeroflexCircuitTechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number UT54ACTS109
Manufacturer Aeroflex Circuit Technology
File Size 63.53 KB
Description Radiation-Hardened Dual J-K Flip-Flops
Datasheet download datasheet UT54ACTS109 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
UT54ACTS10 triple three-input NAND gates ETC
UT54ACTS11 triple three-input AND gates ETC
UT54ACTS132 Radiation-Hardened Quadruple 2-Input NAND Schmitt Triggers ETC
UT54ACTS138 3-Line to 8-Line Decoders/Demultiplexers ETC
UT54ACTS139 UT54ACS139/UT54ACTS139 ETC

Other Datasheets by Aeroflex Circuit Technology

Part Number Description
UT54ACTS10 Triple 3-Input NAND Gates
UT54ACTS11 Triple 3-Input AND Gates
UT54ACTS132 Quadruple 2-Input NAND Schmitt Triggers
UT54ACTS138 3-Line to 8-Line Decoders/Demultiplexers
UT54ACTS139 Dual 2-Line to 4-Line Decoders/Demultiplexers

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com UT54ACS109/UT54ACTS109 Radiation-Hardened Dual J-K Flip-Flops FEATURES • • • • • • radiation-hardened CMOS - Latchup immune High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package - 16-pin DIP - 16-lead flatpack PINOUTS 16-Pin DIP Top View CLR1 J K1 CLK1 PRE1 Q1 Q1 VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD CLR2 J2 K2 CLK2 PRE2 Q2 Q2 DESCRIPTION The UT54ACS109 and the UT54ACTS109 are dual J-K positive triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the other input levels. When preset and clear are inactive (high), data at the J and K input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse.
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