A5988 Datasheet | Allegro MicroSystems

FEATURES AND BENEFITS - 40 V output rating - 4 full bridges - Dual stepper motor driver - High-current outputs - 3.3 and 5 V patible logic - Synchronous rectification - Internal undervoltage lockout (UVLO) - Thermal shutdown circuitry - Crossover-current protection - Overcurrent protection - Low-power sleep mode - Low-profile QFN package PACKAGES Package EV, 36-pin QFN 0.90 mm nominal height with exposed thermal pad Package JP, 48-pin LQFP with exposed thermal pad Not to scale DESCRIPTION The A5988 is a quad DMOS full-bridge driver capable of driving up to two stepper motors or four DC motors. Each full-bridge output is rated up to 1.6 A and 40 V. The A5988 includes fixed off-time pulse-width modulation (PWM) current regulators, along with 2- bit nonlinear DACs (digital-to-analog converters) that allow stepper motors to be controlled in full, half, and quarter steps, and DC motors in forward, reverse, and coast modes. The PWM current regulator uses the Allegro™ patented mixed decay mode for reduced audible motor noise, increased step accuracy, and reduced power dissipation. Internal synchronous rectification control circuitry is provided to improve power dissipation during PWM operation. Protection features include thermal shutdown with hysteresis, undervoltage lockout (UVLO) and crossover-current protection. Special power-up sequencing is not required. The A5988 is supplied in two packages, EV and JP, with exposed power tabs for enhanced thermal performance. The EV is a 6 mm × 6 mm, 36-pin QFN package with a nominal overall package height of 0.90 mm. The JP is a 7 mm × 7 mm 48-pin LQFP. Both packages are lead (Pb) free, with 100% matte-tin leadframe plating. 0.1 µF 50 V 0.1 µF 50 V VMOTOR 32 V - JP package only Microprocessor VREF FAULTn- PHASE1 I01 I11 PHASE2 I02 I12 PHASE3 I03 I13 PHASE4 I04 I14 VREF1 VREF2 VREF3 VREF4 SLEEPn CP1 CP2 VCP VBB1 VBB2 100 µF 50 V 0.22 µF 50 V OUT1A OUT1B OUT2A OUT2B OUT3A OUT3B OUT4A OUT4B SENSE2 SENSE1 SENSE3...