Datasheet Summary
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5V 256K×16 CMOS DRAM (EDO) Features
- Organization: 262,144 words × 16 bits
- High speed
- 30/35/50 ns RAS access time
- 16/18/25 ns column address access time
- 7/10/10/10 ns CAS access time
- Low power consumption
- Active: 500 mW max (AS4C256K16E0-25)
- Standby: 3.6 mW max, CMOS I/O (AS4C256K16E0-25)
- EDO page mode
- Refresh
- 512 refresh cycles, 8 ms refresh interval
- RAS-only or CAS-before-RAS refresh or self-refresh
- Self-refresh option is available for new generation device only. Contact Alliance for more information.
- Read-modify-write
- TTL-patible, three-state I/O
- JEDEC standard packages
- 400 mil, 40-pin SOJ
- 400 mil, 40/44-pin TSOP II
- 5V power supply
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