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October 2021
®
5.0V 4Mb (512K × 8) CMOS FAST SRAM
Revision History 4Mb (512K x 8) CMOS FAST SRAM
Revision Details Rev 1.0 Initial Release
Rev 1.1 Rev 1.2
Included ICC, ISB & ISB1 parameters,Corrected the following: TOE, VIH, VOL & tWZ
Removed the title ”PRELIMINARY INFORMATION”
Rev 1.3 Revised Ordering codes to include suffix "N" (Lead Free Parts)
AS7C4096A
Date Nov. 2004 May. 2005 Feb. 2006 Oct. 2021
10/15/2021, v.1.3
Alliance Memory Inc.
P. 1 of 10
Copyright © Alliance Memory Inc.All rights reserved.
October 2021
AS7C4096A
®
5.