Datasheet Summary
March 2004
®
5V 32K×16 CMOS SRAM
Features
- Industrial and mercial temperature
- Organization: 32,768 words × 16 bits
- Center power and ground pins
- High speed
- 10/12/15/20 ns address access time
- 5, 6, 7, 8 ns output enable access time
- Low power consumption: ACTIVE
- 605mW / max @ 10 ns
- Low power consumption: STANDBY
- 55 mW / max CMOS I/O
- 6T 0.18u CMOS Technology
- Easy memory expansion with CE, OE inputs
- TTL-patible, three-state I/O
- 44-pin JEDEC standard package
- 400 mil SOJ
- 400 mil TSOP 2
- ESD protection > 2000 volts
- Latch-up current > 200 mA
Row decoder
A8 A9 A10 A11 A12 A13 A14
Logic block diagram
A0
A1
A2
32K ×...